Search Results - "Manetakis, Konstantinos"

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    9.6 A 2.7-to-4.3GHz, 0.16psrms-jitter, −246.8dB-FOM, digital fractional-N sampling PLL in 28nm CMOS by Xiang Gao, Burg, Olivier, Haisong Wang, Wanghua Wu, Cao-Thong Tu, Manetakis, Konstantinos, Fan Zhang, Tee, Luns, Yayla, Mustafa, Sining Xiang, Tsang, Randy, Li Lin

    “…High-performance phase-locked-loops (PLLs) are key building blocks for many modern ICs. The sub-sampling PLL proposed in [1] uses a reference clock REF to…”
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    Conference Proceeding
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    Intermediate frequency cmos analogue cells for wireless communications by Manetakis, Konstantinos

    Published 01-01-1999
    “…In this Ph.D. thesis, we address a number of issues associated with the application of CMOS technology in the design of VLSI circuits for wireless…”
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    Dissertation