A 2.4 GHz Energy-efficient Short-range Receiver with Wake-up and Multiple Gain Settings for Wireless Sensor Networks

Wireless sensor networks for monitoring and sensing applications have grown steadily in recent years. These applications are composed of swarm of sensor nodes within close proximity. Typical nodes have a limited power supply and the communications block usually has the largest percentage in the tota...

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Bibliographic Details
Published in:	TENCON 2018 - 2018 IEEE Region 10 Conference pp. 0026 - 0031
Main Authors:	Cabrera, George Procyon, Credo, Jhelsea, Evidente, Gio Ishmael, Malatbalat, Ralen Rose Gloria, Mindoro, Steven Lorenzo, Ricardo Sanico, Arlo, Alvarez, Anastacia, Densing, Chris Vincent, Jossel Maestro, Rico, Rosales, Marc, de Leon, Maria Theresa
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01-10-2018
Subjects:	Baluns Baseband Envelope detectors Power demand Radio frequency Receivers Transistors
Online Access:	Get full text
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Summary:	Wireless sensor networks for monitoring and sensing applications have grown steadily in recent years. These applications are composed of swarm of sensor nodes within close proximity. Typical nodes have a limited power supply and the communications block usually has the largest percentage in the total power consumption. Current trends are geared towards low power design and to address this, three gain settings on the main data receiver's intermediate frequency stage was incorporated to the system based on the transmitter and receiver distance range of 1 m to 10 m. A wake-up receiver was also integrated with the main data receiver, taking the role of idle listening as the main receiver is in sleep mode. The main receiver has a sensitivity of -50 dBm to -70 dBm and consumes 4.14 mW of power, while the wake-up receiver has a sensitivity of -50 dBm and consumes 13.73 µW of power. An energy efficiency of 4.1 nJ/bit and 138 pJ/bit are achieved by the main and wake-up receivers, respectively. Up to 90% of power savings can be achieved as long as the main receiver duty cycle does not go beyond 96%. The estimated area of the integrated receiver chip layout is 1.634 sq. mm.
ISSN:	2159-3450
DOI:	10.1109/TENCON.2018.8650538