Compact SPICE model for single electron tunnel junction
This paper presents a SPICE model for single electron tunneling (SET) junction based on the orthodox theory of single electronics. This model is more efficient than comparable models. The effect of tunneling resistance, junction capacitance and temperature are included in this model. SET junction is...
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Published in: | 2007 Internatonal Conference on Microelectronics pp. 359 - 362 |
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Main Authors: | , , |
Format: | Conference Proceeding |
Language: | English |
Published: |
IEEE
01-12-2007
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Subjects: | |
Online Access: | Get full text |
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Summary: | This paper presents a SPICE model for single electron tunneling (SET) junction based on the orthodox theory of single electronics. This model is more efficient than comparable models. The effect of tunneling resistance, junction capacitance and temperature are included in this model. SET junction is modeled by a resistor, capacitor, voltage controlled current source, two hard limiters, time control circuit, and delay element. The tunneling event of an electron is modeled by an impulse current passing through the junction for a very small period of time. Simulation results show that the tunneling resistance has a great effect on the tunneling rate and the temperature has a slightly effect. The proposed model results are verified by published data which was simulated by Monte Carlo simulator SIMON and show a good agreement. |
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ISBN: | 1424418461 9781424418466 |
ISSN: | 2159-1660 |
DOI: | 10.1109/ICM.2007.4497729 |