Search Results - "MINAKATA, Hiroshi"

Continuous growth of heavily doped p+-n+ Si epitaxial layer using low-temperature photoepitaxy by YAMAZAKI, T, MINAKATA, H, ITO, T

“…Heavily doped p+ and n+ silicon epitaxial layers were continuously grown at 600 °C using photoenhanced epitaxy. The heavily phosphorus-doped photoepitaxial…”
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Formation of HfSiON/SiO2/Si-substrate gate stack with low leakage current for high-performance high-κ misfets by YAMAGUCHI, Masaomi, SAKODA, Tsunehisa, MINAKATA, Hiroshi, SHIQIN XIAO, MORISAKI, Yusuke, IKEDA, Kazuto, MISHIMA, Yasuyoshi

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Segregation coefficient of impurities at polycrystalline Si/HfO 2 interfaces by Suzuki, Kunihiro, Minakata, Hiroshi, Sakota, Tsunehisa, Yamaguchi, Masaomi, Tamura, Yasukuki

“…We evaluated the segregation coefficient m of B, P, and As at the polycrystalline Si/HfO 2 interface. The m values of B, P, and As are between 0.3 and 1 and…”
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Segregation coefficient of impurities at polycrystalline Si/HfO2 interfaces by SUZUKI, Kunihiro, MINAKATA, Hiroshi, SAKOTA, Tsunehisa, YAMAGUCHI, Masaomi, TAMURA, Yasukuki

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Characterization of millisecond-anneal-induced defects in SiON and SiON/Si interface by gate current fluctuation measurement by Sakoda, Tsunehisa, Nishigaya, Keita, Kubo, Tomohiro, Hori, Mitsuaki, Minakata, Hiroshi, Kobayashi, Yuko, Mori, Hiroko, Ono, Katsuji, Tanahashi, Katsuto, Tamura, Naoyoshi, Mori, Toshifumi, Tosaka, Yoshiharu, Matsuyama, Hideya, Kaneta, Chioko, Hashimoto, Koichi, Kase, Masataka, Nara, Yasuo

“…In this paper, we have investigated bulk trap and interface trap density (D it ) caused by millisecond annealing (MSA) using gate current fluctuation (GCF) and…”
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1st quantitative failure-rate calculation for the actual large-scale SRAM using ultra-thin gate-dielectric with measured probability of the gate-current fluctuation and simulated circuit failure-rate by Sakoda, T., Tamura, N., Shiqin Xiao, Minakata, H., Morisaki, Y., Nishigaya, K., Saiki, T., Uetake, T., Iwasaki, T., Ehara, H., Matsuyama, H., Shimizu, H., Hashimoto, K., Kimoto, M., Kase, M., Ikeda, K.

“…We investigated the influence over intermittent SRAM failure by gate current, Ig, fluctuation for the first time. In this paper, we also describe the…”
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Ti-capping technique as a breakthrough for achieving low threshold voltage, high mobility, and high reliability of pMOSFET with metal gate and high-k dielectrics technologies by Takahashi, H., Minakata, H., Morisaki, Y., Shiqin Xiao, Nakabayashi, M., Nishigaya, K., Sakoda, T., Ikeda, K., Morioka, H., Tamura, N., Kase, M., Nara, Y.

“…We have proposed inhibition mechanism of common Al-capping technique for pMOSFET threshold-voltage (V th ) control for the first time, and have established…”
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