Search Results - "Lou, J.H."

A 1.5-V full-swing bootstrapped CMOS large capacitive-load driver circuit suitable for low-voltage CMOS VLSI by Lou, J.H., Kuo, J.B.

“…This paper reports a 1.5-V full-swing bootstrapped CMOS large capacitive-load driver circuit using two bootstrap capacitors to enhance the switching speed for…”
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Investigation of interfacial reaction in SiC fiber reinforced Ti–43Al–9V composites by Zhang, W., Yang, Y.Q., Zhao, G.M., Huang, B., Feng, Z.Q., Luo, X., Li, M.H., Lou, J.H.

“…SiC fiber reinforced titanium aluminides matrix composites based on TiAl (Ti–43Al–9V) were fabricated by means of matrix-coated fiber method through hot…”
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Analysis on the interfacial shear strength of fiber reinforced titanium matrix composites by shear lag method by Sun, Q., Luo, X., Yang, Y.Q., Lou, J.H., Li, M.H., Huang, B., Li, C.

“…Based on shear-lag method, two models for a single fiber push-out test are proposed to evaluate the interfacial shear strength of SiC fiber-reinforced…”
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Study on longitudinal tensile properties of SiC f/Ti–6Al–4V composites with different interfacial shear strength by Lou, J.H., Yang, Y.Q., Sun, Q., Li, J., Luo, X.

“…► Tensile properties are simulated by ANSYS-APDL with residual stress considered. ► Different strength value is assigned to each element of the fibers. ►…”
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Study on longitudinal tensile properties of SiCf/Ti―6Al―4V composites with different interfacial shear strength by LOU, J. H, YANG, Y. Q, SUN, Q, LI, J, LUO, X

“…The effect of interfacial shear strength on the longitudinal tensile properties of SiCf/Ti-6Al-4V composites was investigated using the Monte Carlo finite…”
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The analysis on transverse tensile behavior of SiC/Ti–6Al–4V composites by finite element method by Lou, J.H., Yang, Y.Q., Luo, X., Yuan, M.N., Feng, G.H.

“…A two-dimensional finite element model is created to investigate the effects of temperature and residual stress on transverse tensile behaviors for…”
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A 1.5-V bootstrapped pass-transistor-based Manchester carry chain circuit suitable for implementing low-voltage carry look-ahead adders by Lou, J.H., Kuo, J.B.

“…This paper reports a 1.5-V bootstrapped pass-transistor-based Manchester carry chain circuit suitable for implementing low-voltage carry look-ahead adders. As…”
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A 1.5-V CMOS all-N-logic true-single-phase bootstrapped dynamic-logic circuit suitable for low supply voltage and high-speed pipelined system operation by Lou, J.H., Kuo, J.B.

“…This paper presents a 1.5-V CMOS true-single-phase (TSP) bootstrapped dynamic-logic (BDL) circuit using all-N-logic and bootstrapped circuit techniques for…”
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1.5 V CMOS bootstrapped dynamic logic circuit techniques (BDLCT) suitable for low-voltage deep-submicron CMOS VLSI for implementing 482 MHz digital quadrature modulator and adder by Lou, J.H., Kuo, J.B.

“…This paper reports 1.5 V CMOS bootstrapped dynamic logic circuit techniques (BDLCT) suitable for low-voltage deep-submicron CMOS VLSI. Using BDLCT, the maximum…”
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A 1.5 V bootstrapped pass-transistor-based carry look-ahead circuit suitable for low-voltage CMOS VLSI by Lou, J.H., Kuo, J.B.

“…This paper reports a 1.5 V bootstrapped pass-transistor-based carry look-ahead circuit suitable for CMOS VLSI using a low supply voltage. With the bootstrapped…”
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1.5V CMOS And BiCMOS Bootstrapped Dynamic Logic Circuits Suitable For Low-voltage VLSI by Lou, J.H., Kuo, J.B.

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A BiCMOS dynamic multiplier using Wallace tree reduction architecture and 1.5-V full-swing BiCMOS dynamic logic circuit by Kuo, J.B., Su, K.W., Lou, J.H.

“…The authors present a BiCMOS dynamic multiplier, which is free from race and charge-sharing problems, using Wallace tree reduction architecture and 1.5-V…”
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Cost-variance analysis by DRGs; a technique for clinical budget analysis by Voss, Gemma B.W., Limpens, Pascal G.P., Brans-Brabant, Lou J.H., van Ooij, André

“…In this article it is shown how a cost accounting system based on DRGs can be valuable in determining changes in clinical practice and explaining alterations…”
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A 1.5 V full-swing BiCMOS dynamic logic gate circuit suitable for VLSI using low-voltage BiCMOS technology by Kuo, J.B., Su, K.W., Lou, J.H., Chen, S.S., Chiang, C.S.

“…This paper presents a 1.5 V full-swing BiCMOS dynamic logic gate circuit, based on a dynamic pull-down BiPMOS configuration, suitable for VLSI using…”
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A 1.5 V CMOS high-speed 16-bit/spl divide/8-bit divider using the quotient-select architecture and true-single-phase bootstrapped dynamic circuit techniques suitable for low-voltage VLSI by Yeh, C.C., Lou, J.H., Kuo, J.B.

“…Based on a 0.8 /spl mu/m CMOS technology, the speed performance of this 16-bit/spl divide/8-bit divider circuit is improved by 45% as compared to the divider…”
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A high-speed 1.5 V clocked BiCMOS latch for BiCMOS dynamic pipelined digital logic VLSI systems by Kuo, J.B., Lou, J.H., Su, I.W.

“…This paper presents a high-speed 1.5 V clocked BiCMOS dynamic latch, which is derived from a clocked CMOS dynamic latch and a BiCMOS logic gate using BiPMOS…”
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A BiCMOS dynamic multiplier using Wallace tree reduction architecture and 1.5 V full-swing BiCMOS dynamic logic circuit by Kuo, J.B., Su, K.W., Lou, J.H.

“…This paper presents a BiCMOS dynamic multiplier, which is free from race and charge sharing problems, using Wallace tree reduction architecture and 1.5 V…”
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Parametric study of immersed-coil heat exchanger by Lou, J.H., Lin, J.Y., Chuah, Y.K.

“…The authors present a study in which an immersed-coil heat exchanger is both a water heater and a heat exchanger, with the coil immersed in a water tank, which…”
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A CMOS quadrature modulator for wireless communication IC by Lin, P.F., Lou, J.H., Kuo, J.B.

“…This brief presents a CMOS digital quadrature modulator, which is based on a CMOS digital modulator and a five-level digital-to-analog converter, for wireless…”
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Device-level analysis of a BiPMOS pull-down device structure for low-voltage dynamic BiCMOS VLSI by Kuo, J.B., Su, K.W., Lou, J.H., Ma, Y., Chen, S.S., Chiang, C.S.

“…This paper presents a device-level analysis of a BiPMOS pull-down structure for low-voltage dynamic BiCMOS logic gate circuit suitable for VLSI using…”
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