Search Results - "Loke, A. L. S."
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1
An 8.0-Gb/s HyperTransport Transceiver for 32-nm SOI-CMOS Server Processors
Published in IEEE journal of solid-state circuits (01-11-2012)“…We present an 8.0-Gb/s HyperTransport source-synchronous I/O integrated in a 32-nm SOI-CMOS processor for high-performance servers. Based on a 45-nm design…”
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Journal Article Conference Proceeding -
2
Microstructure and reliability of copper interconnects
Published in IEEE transactions on electron devices (01-06-1999)“…The effects of texture and grain structure on the electromigration lifetime of Cu interconnects are reported. Using different seed layers, [111]- and…”
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Journal Article -
3
Demonstration of scaled (⩾0.12 μm2) Pb(Zr,Ti)O3 capacitors on W plugs with Al interconnect
Published in Applied physics letters (10-12-2001)“…The measured switched polarization properties of integrated Pb(Zr,Ti)O3 (PZT) capacitors arrays have been found to show a small dependence on individual…”
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4
Kinetics of copper drift in PECVD dielectrics
Published in IEEE electron device letters (01-12-1996)“…We quantified the drift of Cu ions into various PECVD dielectrics by measuring shifts in capacitance-voltage behavior after subjecting Cu-gate MOS capacitors…”
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5
Bridging design and manufacture of analog/mixed-signal circuits in advanced CMOS
Published in 2011 Symposium on VLSI Technology - Digest of Technical Papers (01-06-2011)“…We present device and circuit characterization resulting from technology/design co-development to improve the design and manufacture of analog/mixed-signal…”
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Conference Proceeding -
6
Kinetics of copper drift in low-kappa polymer interleveldielectrics
Published in IEEE transactions on electron devices (01-11-1999)“…This paper addresses the drift of copper ions (Cu( )) in various low-permittivity (low-kappa) polymer dielectrics to identify copper barrier requirements for…”
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Journal Article -
7
Electrical leakage at low-K polyimide/TEOS interface
Published in IEEE electron device letters (01-06-1998)“…The effect of low-K polymer passivation on electrical leakage was investigated to evaluate the reliability of polymer integration on device wafers. Polyimide…”
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Journal Article -
8
Extending HyperTransport™ technology to 8.0 Gb/s in 32-nm SOI-CMOS processors
Published in IEEE Asian Solid-State Circuits Conference 2011 (01-11-2011)“…We present an 8.0-Gb/s HyperTransport™ technology I/O built in a 32-nm SOI-CMOS processor for high-performance servers. Based on a 45-nm design that caps at…”
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Conference Proceeding