Search Results - "Liu, Zuoguang"

Sub- 10^~\Omega -cm2 n-Type Contact Resistivity for FinFET Technology by Niimi, Hiroaki, Zuoguang Liu, Gluschenkov, Oleg, Mochizuki, Shogo, Fronheiser, Jody, Juntao Li, Demarest, James, Chen Zhang, Bei Liu, Jie Yang, Raymond, Mark, Haran, Bala, Huiming Bu, Yamashita, Tenko

“…We report record low 8.4 × 10 -10 Ω-cm 2 n-type S/D contact resistivity with laser-induced solid/liquid phase epitaxy of Si:P inside nano-scale contact…”
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Impact of Phase‐Change Memory Flicker Noise and Weight Drift on Analog Hardware Inference for Large‐Scale Deep Learning Networks by Han, Jin-Ping, Rasch, Malte J., Liu, Zuoguang, Solomon, Paul, Brew, Kevin, Cheng, Kangguo, Ok, Injo, Chan, Victor, Longstreet, Michael, Kim, Wanki, Bruce, Robert L., Cheng, Cheng-Wei, Saulnier, Nicole, Narayanan, Vijay

“…The analog AI core concept is appealing for deep‐learning (DL) because it combines computation and memory functions into a single device. Yet, significant…”
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Effect of hydrogen on the chemical bonding and band structure at the Al2O3/In0.53Ga0.47As interface by Shekhter, Pini, Kornblum, Lior, Liu, Zuoguang, Cui, Sharon, Ma, T. P., Eizenberg, Moshe

“…Surface passivation of high mobility semiconductors such as InGaAs is a crucial bottleneck towards their integration in metal-oxide-semiconductor devices. The…”
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Dual beam laser annealing for contact resistance reduction and its impact on VLSI integrated circuit variability by Zuoguang Liu, Gluschenkov, Oleg, Niimi, Hiroaki, Bei Liu, Juntao Li, Demarest, James, Mochizuki, Shogo, Adusumilli, Praneet, Raymond, Mark, Carr, Adra, Shaoyin Chen, Yun Wang, Jagannathan, Hemanth, Yamashita, Tenko

“…Introduction of a dual beam (DB) millisecond (mSec) or nanosecond (nSec laser annealing in contact module results in a drastic reduction of contact…”
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Separation of interface states and electron trapping for hot carrier degradation in ultra-scaled replacement metal gate n-FinFET by Miaomiao Wang, Zuoguang Liu, Yamashita, Tenko, Stathis, James H., Chia-yu Chen

“…A fast two-point measurement methodology, applicable to nano-scale devices, is introduced to separate electron trapping (Not, e) from interface state…”
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Inelastic electron tunneling spectroscopy study of ultrathin Al2O3–TiO2 dielectric stack on Si by Liu, Zuoguang, Cui, Sharon, Kornblum, Lior, Eizenberg, Moshe, Chang, Ming-Feng, Ma, T. P.

“…We report the properties of an ultrathin Al2O3–TiO2 dielectric stack with the equivalent-oxide thickness =1.0 nm. The stack exhibits nondiscernable interfacial…”
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High-Quality Al2O3 for Low-Voltage High-Speed High-Temperature (Up to 250 °C) Nonvolatile Memory Technology by SHARON CUI, PENG, Cheng-Yi, WENQI ZHANG, XIAO SUN, JIE YANG, ZUOGUANG LIU, KORNBLUM, Lior, EIZENBERG, Moshe, MA, T. P

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High-Quality \hbox\hbox for Low-Voltage High-Speed High-Temperature (Up to 250 ^\hbox ) Nonvolatile Memory Technology by Cui, Sharon, Cheng-Yi Peng, Wenqi Zhang, Xiao Sun, Jie Yang, Zuoguang Liu, Kornblum, Lior, Eizenberg, Moshe, Ma, T P

“…We report the properties of a MANAS (Metal/Al 2 O 3 /Nitride/Al 2 O 3 /Si) charge-trap memory cell structure, in which both the tunnel and the blocking…”
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High-k metal gate fundamental learning and multi-Vt options for stacked nanosheet gate-all-around transistor by Jingyun Zhang, Ando, Takashi, Chun Wing Yeung, Miaomiao Wang, Ohseong Kwon, Galatage, Rohit, Chao, Robin, Loubet, Nicolas, Bum Ki Moon, Ruqiang Bao, Vega, Reinaldo A., Juntao Li, Chen Zhang, Zuoguang Liu, Myunggil Kang, Xin Miao, Junli Wang, Kanakasabapathy, Sivananda, Basker, Veeraraghavan S., Jagannathan, Hemanth, Yamashita, Tenko

“…In this paper, we report multi-threshold-voltage (multi-Vt) options for stacked Nanosheet gate-all-around (GAA) transistors. V t can be modulated through…”
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FinFET External Resistance Analysis by Extended Shift-and-Ratio Method by Zhang, Chen, Liu, Zuoguang, Miao, Xin, Yamashita, Tenko

“…Extraction and analysis of external resistance (<inline-formula> <tex-math notation="LaTeX">{R}_{\textsf {ext}} </tex-math></inline-formula>) have become…”
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Integrated dual SPE processes with low contact resistivity for future CMOS technologies by Heng Wu, Soon-Cheon Seo, Chengyu Niu, Wei Wang, Tsutsui, Gen, Gluschenkov, Oleg, Zuoguang Liu, Petrescu, Alexandru, Carr, Adra, Choi, Sam, Tsai, Stan, Chanro Park, Seshadri, Indira, Desilva, Anuja, Arceo, Abraham, Yang, George, Sankarapandian, Muthumanickam, Prindle, Chris, Akarvardar, Kerem, Durfee, Curtis, Jie Yang, Adusumilli, Praneet, Miao, Bruce, Strane, Jay, Kleemeier, Walter, Raymond, Mark, Choi, Kisik, Fee-li Lie, Yamashita, Tenko, Knorr, Andreas, Gupta, Dinesh, Dechao Guo, Divakaruni, Rama, Huiming Bu, Khare, Mukesh

“…In this study, a manufacturable CMOS dual solid phase epitaxy (SPE) process with pc <; 2.2×10 -9 Q-cm 2 on both NFET and PFET is demonstrated on the hardware…”
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Improved Air Spacer for Highly Scaled CMOS Technology by Cheng, Kangguo, Park, Chanro, Wu, Heng, Li, Juntao, Nguyen, Son, Zhang, Jingyun, Wang, Miaomiao, Mehta, Sanjay, Liu, Zuoguang, Conti, Richard, Loubet, Nicolas J., Frougier, Julien, Greene, Andrew, Yamashita, Tenko, Haran, Balasubramanian, Divakaruni, Rama

“…We report an improved air spacer (AS) integration scheme to overcome problems with the conventional AS process. The new scheme is fully compatible with other…”
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Determination of energy and spatial distributions of traps in ultrathin dielectrics by use of inelastic electron tunneling spectroscopy by Liu, Zuoguang, Ma, T. P.

“…In this letter, we show a method to extract valuable information about electronic traps from inelastic electron tunneling spectroscopy (IETS) obtained on a…”
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Technology viable DC performance elements for Si/SiGe channel CMOS FinFTT by Tsutsui, Gen, Ruqiang Bao, Kwan-yong Lim, Robison, Robert R., Vega, Reinaldo A., Jie Yang, Zuoguang Liu, Miaomiao Wang, Gluschenkov, Oleg, Chun Wing Yeung, Watanabe, Koji, Bentley, Steven, Niimi, Hiroaki, Liu, Derrick, Huimei Zhou, Siddiqui, Shariq, Hoon Kim, Galatage, Rohit, Venigalla, Rajasekhar, Raymond, Mark, Adusumilli, Praneet, Mochizuki, Shogo, Devarajan, Thamarai S., Miao, Bruce, Bei Liu, Greene, Andrew, Shearer, Jeffrey, Montanini, Pietro, Strane, Jay W., Prindle, Christopher, Miller, Eric R., Fronheiser, Jody, Niu, Chengyu C., Kisup Chung, Kelly, James J., Jagannathan, Hemanth, Kanakasabapathy, Sivananda, Karve, Gauri, Fee Li Lie, Oldiges, Philip, Narayanan, Vijay, Hook, Terence B., Knorr, Andreas, Gupta, Dinesh, Guo, Dechao, Divakaruni, Rama, Huiming Bu, Khare, Mukesh

“…Low Ge content SiGe-based CMOS FinFET is one of the promising technologies [1-2] offering solutions for both high performance and low power applications. In…”
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Direct Partition Measurement of Parasitic Resistance Components in Advanced Transistor Architectures by Liu, Zuoguang, Wu, Heng, Zhang, Chen, Miao, Xin, Zhou, Huimei, Southwick, Richard, Yamashita, Tenko, Guo, Dechao

“…More-Moore logic device technology roadmap suggests Lateral/Vertical Gate-All-Around (LGAA /VGAA) device architectures beyond FinFETs for further scaling and…”
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Improved Air Spacer Co-Integrated with Self-Aligned Contact (SAC) and Contact over Active Gate (COAG) for Highly Scaled CMOS Technology by Cheng, Kangguo, Park, Chanro, Wu, Heng, Li, Juntao, Nguyen, Son, Zhang, Jingyun, Wang, Miaomiao, Mehta, Sanjay, Liu, Zuoguang, Conti, Richard, Loubet, Nicolas, Frougier, Julien, Greene, Andrew, Yamashita, Tenko, Haran, Bala, Divakaruni, Rama

“…We report an improved air spacer that is successfully co-integrated on FinFET transistors with Self-Aligned Contacts (SAC) and Contacts Over Active Gate…”
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Effect of H on interface properties of Al2O3/In0.53Ga0.47As by Liu, Zuoguang, Cui, Sharon, Shekhter, Pini, Sun, Xiao, Kornblum, Lior, Yang, Jie, Eizenberg, Moshe, Chang-Liao, K. S., Ma, T. P.

“…We report that depositing Al2O3 on InGaAs in an H-containing ambient (e.g., in forming gas) results in significant reduction of interface-trap density and…”
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Effect of hydrogen on the chemical bonding and band structure at the Al 2 O 3 /In 0.53 Ga 0.47 As interface by Shekhter, Pini, Kornblum, Lior, Liu, Zuoguang, Cui, Sharon, Ma, T. P., Eizenberg, Moshe

“…Surface passivation of high mobility semiconductors such as InGaAs is a crucial bottleneck towards their integration in metal-oxide-semiconductor devices. The…”
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Evaluation of a new interferon-gamma release assay and comparison to tuberculin skin test during a tuberculosis outbreak by Song, Qisheng, Guo, Huishan, Zhong, Hui, Liu, Zuoguang, Chen, Xiuqin, Wang, Cui, Touzjian, Neal, Lv, Yichen, Lu, Xiwei, Wang, Qi

“…Summary Background The tuberculin skin test (TST) is commonly used for the diagnosis of latent tuberculosis infection (LTBI) in non-bacille Calmette–Guérin…”
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Inelastic Electron Tunneling Spectroscopy Study of Thin Gate Dielectrics by Reiner, James W., Cui, Sharon, Liu, Zuoguang, Wang, Miaomiao, Ahn, Charles H., Ma, T. P.

“…A broad range of materials is currently being studied for possible use as the insulating layer in next generation metal‐oxide‐semiconductor transistors…”
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