Search Results - "Liao, E.B."
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1
Bendability of single-crystal Si MOSFETs investigated on flexible substrate
Published in IEEE electron device letters (01-07-2006)“…This letter reports on a device layer transfer (based on thermal bonding and grinding backside Si) process and device characteristics of Si MOSFETs on a…”
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Journal Article -
2
Integration of RF MEMS and CMOS IC on a Printed Circuit Board for a Compact RF System Application Based on Wafer Transfer
Published in IEEE transactions on electron devices (01-09-2008)“…In this paper, a novel platform technology for integrating radio-frequency microelectromechanical systems (RF-MEMS) and CMOS on a printed circuit board (PCB)…”
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3
Novel Integration of Metal-Insulator-Metal (MIM) Capacitors Comprising Perovskite-type Dielectric and Cu Bottom Electrode on Low-Temperature Packaging Substrates
Published in IEEE electron device letters (01-01-2008)“…In this letter, a novel integration scheme, for metal-insulator-metal capacitors comprising perovskite-type dielectrics and Cu-based bottom electrodes, has…”
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4
High-density MIM capacitors (/spl sim/85 nF/cm/sup 2/) on organic substrates
Published in IEEE electron device letters (01-12-2005)“…For the first time, transferring the prefabricated capacitors on a silicon wafer onto FR-4 has been used to realize high-density metal-insulator-metal (MIM)…”
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5
Fatigue and Bridging Study of High-Aspect-Ratio Multicopper-Column Flip-Chip Interconnects Through Solder Joint Shape Modeling
Published in IEEE transactions on components and packaging technologies (01-09-2006)“…This paper addresses fatigue and bridging issues by numerical analysis for an ultra-fine-pitch flip-chip interconnect that consists of multiple copper columns…”
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6
Development of 3-D Silicon Module With TSV for System in Packaging
Published in IEEE transactions on components and packaging technologies (01-03-2010)“…Portable electronic products demand multifunctional module comprising of digital, radio frequency and memory functions. Through silicon via (TSV) technology…”
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7
Planar Microspring-A Novel Compliant Chip-to-Package Interconnect for Wafer-Level Packaging
Published in IEEE transactions on advanced packaging (01-05-2009)“…In this paper, a novel compliant chip-to-package interconnect, planar microspring, is presented in terms of design consideration, wafer-level fabrication…”
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8
Numerical analysis on compliance and electrical behavior of multi-copper-column flip-chip interconnects for wafer-level packaging
Published in IEEE transactions on advanced packaging (01-05-2006)“…This paper presents modeling and simulation results of a modified copper-column-based flip-chip interconnect with ultrafine pitch for wafer-level packaging,…”
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9
Etching control of benzocyclobutene in CF 4 / O 2 and SF 6 / O 2 plasmas with thick photoresist and titanium masks
Published in Thin solid films (2006)“…By using thick photoresist AZ9260 and sputtered Ti film as masks, dry etching characteristics of benzocyclobutene (BCB), including etch rates, selectivities…”
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10
Etching control of benzocyclobutene in CF4/O2 and SF6/O2 plasmas with thick photoresist and titanium masks
Published in Thin solid films (10-05-2006)“…By using thick photoresist AZ9260 and sputtered Ti film as masks, dry etching characteristics of benzocyclobutene (BCB), including etch rates, selectivities…”
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Conference Proceeding Journal Article -
11
RF, DC, and Reliability Performance of MIM Capacitors Embedded in Organic Substrates by Wafer-Transfer Technology (WTT) for System-on-Package Applications
Published in IEEE transactions on electron devices (01-03-2007)“…In this paper, radio frequency (RF), dc, and reliability performance have been studied on metal-insulator-metal (MIM) capacitors embedded in organic…”
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12
Development of through silicon via (TSV) interposer technology for large die (21×21mm) fine-pitch Cu/low-k FCBGA package
Published in 2009 59th Electronic Components and Technology Conference (01-05-2009)“…Because of Moore's (scaling/integration) law, the Cu/low-k silicon chip is getting bigger, the pin-out is getting higher, and the pitch is getting finer. Thus,…”
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Conference Proceeding -
13
High density 3D integration using CMOS foundry technologies for 28 nm node and beyond
Published in 2010 International Electron Devices Meeting (01-12-2010)“…Technology challenges and solutions in the development and fabrication of high-density three dimensional (3D) chip integration structures have been…”
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Conference Proceeding -
14
A low insertion loss 60 GHz band pass filter using wafer transfer
Published in 2008 Asia-Pacific Microwave Conference (01-12-2008)“…In this paper, a low insertion loss band pass filter using WTT for 60 GHz band applications is presented. The filter geometry was pre-fabricated on a Si wafer…”
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Conference Proceeding -
15
Compliance, deformation and thermal fatigue behavior of multi-copper-column interconnects
Published in 2005 7th Electronic Packaging Technology Conference (2005)“…In this paper, macro- and micro-modeling technique is implemented to correlate the compliance, deformation and thermal fatigue damage of composite interconnect…”
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Conference Proceeding -
16
High performance embedded RF passive device process integration
Published in 2008 58th Electronic Components and Technology Conference (01-05-2008)“…We report the process evaluation and integration for the embedded RF passive device in this paper. Two sets of test vehicle were designed and fabricated for…”
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Conference Proceeding -
17
Dry Self-Assembly & Gang bonding of micro-components from silicon carrier to substrate wafer
Published in 2006 Thirty-First IEEE/CPMT International Electronics Manufacturing Technology Symposium (01-11-2006)“…We have demonstrated parallel self-assembly process based on mechanical shape-matching between the protrusions of micro-components and the cavities on an 8"…”
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Conference Proceeding -
18
Integration of RF-MEMS, passives and CMOS-IC on silicon substrate by low temperature wafer to wafer bonding technique
Published in 2008 58th Electronic Components and Technology Conference (01-05-2008)“…In this paper, a novel platform technology for system level integration of RF-MEMS, RF passives and CMOS-IC on silicon substrate is reported. The RF passives…”
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Conference Proceeding -
19
Self-Assembly of Components using Shape-matching
Published in 2007 9th Electronics Packaging Technology Conference (01-12-2007)“…This paper describes a process of mass self-assembly of micro-components onto a silicon substrate using mechanical shape-locking mechanism. Protrusions of…”
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Conference Proceeding -
20
Shape matching-assisted self-assembly of microchips on a silicon substrate
Published in 2006 8th Electronics Packaging Technology Conference (01-12-2006)“…The paper describes a process of mass assembly of microchips onto silicon substrate using mechanical shape locking mechanism. A certain pattern was fabricated…”
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Conference Proceeding