Search Results - "Legat, J.D."
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Combined line-based architecture for the 5-3 and 9-7 wavelet transform of JPEG2000
Published in IEEE transactions on circuits and systems for video technology (01-09-2003)“…The wavelet transform is a very promising tool for image compression. In JPEG2000, two filter banks are used, one an integer lossless 5-3 filter, and one a…”
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Journal Article -
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Interests and Limitations of Technology Scaling for Subthreshold Logic
Published in IEEE transactions on very large scale integration (VLSI) systems (01-10-2009)“…Subthreshold logic is an efficient technique to achieve ultralow energy per operation for low-to-medium throughput applications. In this paper, the interests…”
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Journal Article -
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VLSI implementation of a bi-processor architecture for generic subband coding
Published in ESSCIRC '96: Proceedings of the 22nd European Solid-State Circuits Conference (01-09-1996)“…This paper presents an architecture for the multiresolution coding of pictures. A VLSI implementation has been realized and can achieve a peak performance of…”
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Conference Proceeding
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Omnifont recognition of text using topological recognition techniques
Published in Proceedings., 11th IAPR International Conference on Pattern Recognition. Vol.II. Conference B: Pattern Recognition Methodology and Systems (1992)“…The problem of optical character recognition (OCR) has been studied since the early stages of the computer industry. However, the problem of omnifont text…”
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Conference Proceeding -
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A real-time VLSI-based architecture for multi-motion estimation
Published in Proceedings., 11th IAPR International Conference on Pattern Recognition. Vol. IV. Conference D: Architectures for Vision and Pattern Recognition (1992)“…This paper describes a new parallel architecture dedicated to multi-motion estimation. The input image is scanned by a standard video camera with 256 grey…”
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Conference Proceeding -
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Systolic Array Architecture for Early Vision Processing
Published in ESSCIRC '91: Proceedings - Seventeenth European Solid-State Circuits Conference (01-09-1991)“…This paper describes the architecture and the implementation of a systolic processor dedicated to motion estimation which is one of the most important task in…”
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Conference Proceeding -
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A mixed analog/digital coprocessor for image scanning
Published in Euro ASIC '92 (1992)“…A new ASIC coprocessor has been designed for image scanning applications. The chip contains a high performance analog part which is based on an original…”
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Conference Proceeding Journal Article