Search Results - "Lee Yong Meng"

Multi-axial Elastic Averaging for Sub-Micron Passive Alignment of Photonic Components by Goh, Simon Chun Kiat, Siah, Chun Fei, Xu, Baochang, Zhang, Yu, Pam, Mei Er, Guevarra, Enrico, Goh, Edwin Sze Ping, Wang, Lin, Pile, Brian, Carlan, Arbiz, Lee, James Yong Meng, Venkatesan, Suresh, Lim, Yeow Kheng, Thean, Aaron Voon-Yew

“…In recent years, heterogeneous integration (HI) has become a game-changing technology for the construction of complex photonic integrated circuits. Comparing…”
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Blanket SMT With In Situ N2 Plasma Treatment on the (100) Wafer for the Low-Cost Low-Power Technology Application by JUN YUAN, CHAN, Victor, BELYANSKY, Michael P, ELLER, Manfred, YONG MENG LEE, CAVE, Nigel, HUILING SHANG, YING LI, DIVAKARUNI, Rama, ROVEDO, Nivo, SARDESAI, Viraj, KANIKE, Narasimhulu, VARADARAJAN, Vidya, YU, Mickey, JONG HO YANG, JEONG, Y. K, SUNG KWON, O

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An Improved Shift-and-Ratio Effective Channel Length Extraction Method for Metal Oxide Silicon Transistors with Halo/Pocket Implants by Eng, Chee-Wee, Lau, Wai-Shing, Vigar, David, Lee, James Yong-Meng

“…The original shift-and-ratio method tends to over-estimate the effective channel length (Leff) of metal-oxide-Si (MOS) transistors with halo/pocket implants…”
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Blanket SMT With In Situ N2 Plasma Treatment on the \langle \hbox \rangle Wafer for the Low-Cost Low-Power Technology Application by Jun Yuan, Chan, V., Rovedo, N., Sardesai, V., Kanike, N., Varadarajan, V., Yu, M., Jong Ho Yang, Jeong, Y.K., Kwon, O.S., Belyansky, M.P., Eller, M., Yong Meng Lee, Cave, N., Huiling Shang, Ying Li, Divakaruni, R.

“…PMOS degradation with the blanket-stress-memory-technique (SMT) nitride layer on the (100) wafer with ?100? orientation has been observed, and the degradation…”
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Blanket SMT With In Situ N2 Plasma Treatment on the langle hbox 100 rangle Wafer for the Low-Cost Low-Power Technology Application by Yuan, Jun, Chan, V, Rovedo, N, Sardesai, V, Kanike, N, Varadarajan, V, Yu, M, Ho Yang, Jong, Jeong, Y K, Kwon, O S, Belyansky, M P, Eller, M, Meng Lee, Yong, Cave, N, Shang, Huiling, Li, Ying, Divakaruni, R

“…PMOS degradation with the blanket-stress-memory-technique (SMT) nitride layer on the (100) wafer with ?100? orientation has been observed, and the degradation…”
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Passively Aligned Flip-chip Laser Diodes using Multi-axial Slide-stop Guided Design and Laser Assisted Bonding (LAB) on a CMOS-based Optical Interposer by Goh, Simon Chun Kiat, Xu, Baochang, Zhang, Yu, Siah, Chun Fei, Zhao, Bo, Sebastian, Rappl, Lee, James Yong Meng, Venkatesan, Suresh, Thean, Aaron Voon Yew, Lim, Yeow Kheng

“…The incorporation of rectangular slide-stop structures improve post-bond accuracy by 1.6X achieving a best-in-class relative axial offset of 0.13μm…”
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Comparison of latchup immunity for silicided source/drain at different n super(+) implant energy by Leong, Kam-Chew, Liu, Po-Ching, Yeo, Kiat Seng, Gan, Chock-Hing, Qian, Gang, Lee, Yong-Meng, Chan, Lap

“…The effect of titanium silicided (TiSi sub(2)) on latchup immunity for different n super(+) source/drain (s/d) junction depth is investigated. Highly latchup…”
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Comparison of latchup immunity for silicided source/drain at different n + implant energy by Leong, Kam-Chew, Liu, Po-Ching, Yeo, Kiat Seng, Gan, Chock-Hing, Qian, Gang, Lee, Yong-Meng, Chan, Lap

“…The effect of titanium disilicide (TiSi 2) on latchup immunity for different n + source/drain (s/d) junction depth is investigated. Highly latchup immune 0.25…”
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Comparison of latchup immunity for silicided source/drain at different n+ implant energy by Leong Kam Chew, Liu Po Chen, Gan Chock Hing, Qian Gang, Lee Yong Meng, Lap Chan

“…N-channel MOSFET devices with excellent latchup immunity for 0.25 /spl mu/m technology are fabricated with 50 /spl Aring/ gate oxide, retrograde N-Well,…”
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