Search Results - "LUBASZEWSKI, MARCELO SOARES"

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    A 2-transistor sub-1V low power temperature compensated CMOS voltage reference by Olmos, Alfredo, Pablo, Juan, Brito, Martinez, Jorge, Fabricio, Ferreira, Antunes, Chavez, Fernando, Soares Lubaszewski, Marcelo

    “…This paper presents the design of a CMOS sub-1V voltage reference using a 2-transistor Self-Cascode MOSFET structure able to get low power consumption,…”
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    Conference Proceeding
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    Fault Detection, Diagnosis and Prediction in Electrical Valves Using Self-Organizing Maps by Gonçalves, Luiz Fernando, Bosa, Jefferson Luiz, Balen, Tiago Roberto, Lubaszewski, Marcelo Soares, Schneider, Eduardo Luis, Henriques, Renato Ventura

    Published in Journal of electronic testing (01-08-2011)
    “…This paper presents a proactive maintenance scheme for fault detection, diagnosis and prediction in electrical valves. The proposed scheme is validated with a…”
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    Journal Article
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    Low pin count DfT technique for RFID ICs by de Souza Moraes, M., Herve, M. B., Lubaszewski, M. S.

    “…The need of uniquely identifiable objects for multiple applications has given great attention to RFID ICs over the years. The test challenges imposed by the…”
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    Conference Proceeding
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    Fault Models and Test Generation for OpAmp Circuits--The FFM by Calvano, José Vicente, de Mesquita Filho, Antônio Carneiro, Alves, Vladimir Castro, Lubaszewski, Marcelo Soares

    Published in Journal of electronic testing (01-04-2001)
    “…The analog VLSI technology processes are reaching the matureness, nevertheless, there is a big constraint, regarding their use on complex electronic products:…”
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    Journal Article
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    Improving ATPG Gate-Level Fault Coverage by using Test Vectors generated from Behavioral HDL Descriptions by Krug, Margrit Reni, Lubaszewski, Marcelo Soares, Souza Moraes, Marcelo De

    “…Current hardware design flows include test pattern generation as a single step to be performed only after logical synthesis. However, early generation of few…”
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    Conference Proceeding
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    Synthesis method for testable electrical networks using 1st order building blocks by Calvano, José Vicente, de Mesquita Filho, Antônio Carneiro, Alves, Vladimir Castro, Lubaszewski, Marcelo Soares

    Published in Microelectronics (01-10-2002)
    “…This work presents a method for synthesizing testable continuous-time linear time-invariant electrical networks using 1st order blocks for the implementation…”
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    Journal Article