Search Results - "Kuper, Fred G"

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  1. 1

    Automotive IC reliability: Elements of the battle towards zero defects by Kuper, Fred G.

    Published in Microelectronics and reliability (01-08-2008)
    “…The battle towards zero defects consists of fast response to PPM signals, prevention of incidents and continuous improvement. In this paper elements of all…”
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    Journal Article Conference Proceeding
  2. 2

    MOSFET Degradation Under RF Stress by Sasse, G.T., Kuper, F.G., Schmitz, J.

    Published in IEEE transactions on electron devices (01-11-2008)
    “…We report on the degradation of MOS transistors under RF stress. Hot-carrier degradation, negative-bias temperature instability, and gate dielectric breakdown…”
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    Journal Article
  3. 3

    Impact of particles in ultra pure water on random yield loss in IC production by Wali, Faisal, Knotter, D. Martin, Mud, Auke, Kuper, Fred G.

    Published in Microelectronic engineering (01-02-2009)
    “…The influence of environmental particle contamination on offline measured defects and manufacturing yield in integrated circuits is discussed. One of the…”
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    Journal Article Conference Proceeding
  4. 4

    RF CMOS reliability simulations by Sasse, Guido T., Acar, Mustafa, Kuper, Fred G., Schmitz, Jurriaan

    Published in Microelectronics and reliability (01-08-2008)
    “…We present a simulation approach to assess the reliability of an RF CMOS circuit under user conditions, based on existing DC degradation models for gate-oxide…”
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    Journal Article Conference Proceeding
  5. 5

    Current Degradation of a-Si:H/SiN TFTs at Room Temperature and Low Voltages by Merticaru, A.R., Mouthaan, A.J., Kuper, F.G.

    Published in IEEE transactions on electron devices (01-09-2006)
    “…This paper focuses on the long-term electrical degradation of hydrogenated amorphous silicon (a-Si:H)/silicon nitride (SiN) thin-film transistors (TFTs)…”
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    Journal Article
  6. 6
  7. 7

    Analysis of the electrical breakdown in hydrogenated amorphous silicon thin-film transistors by Golo, N.T., Kuper, F.G., Mouthaan, T.J.

    Published in IEEE transactions on electron devices (01-06-2002)
    “…Electrical breakdown induced by systematic electrostatic discharge (ESD) stress of thin-film transistors used as switches in active matrix addressed liquid…”
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    Journal Article
  8. 8

    Estimation of the impact of electrostatic discharge on density of states in hydrogenated amorphous silicon thin-film transistors by Golo, Natasa Tosic, van der Wal, Siebrigje, Kuper, Fred G., Mouthaan, Ton

    Published in Applied physics letters (06-05-2002)
    “…The objective of this letter is to give an estimation of the impact of an electrostatic discharge (ESD) stress on the density of states (DOS) within the energy…”
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    Journal Article
  9. 9

    A 3-D Circuit Model to evaluate CDM performance of ICs by Sowariraj, M.S.B., Smedes, Theo, de Jong, Peter C., Salm, Cora, Mouthaan, Ton, Kuper, Fred G

    Published in Microelectronics and reliability (01-09-2005)
    “…This paper presents a physical description of the static charge flow through an IC during a CDM event. Based on this description, an equivalent 3-D circuit to…”
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    Journal Article Conference Proceeding
  10. 10

    Relation between yield and reliability of integrated circuits and application to failure rate assessment and reduction in the one digit FIT and PPM reliability ERA by Van Der Pol, Jacob A., Kuper, Fred G., Ooms, Eric R.

    Published in Microelectronics and reliability (01-11-1996)
    “…Clear relations have been established between E-sort yield and burn-in, EFR and field failure rates for nearly 50 million high volume products in bipolar, CMOS…”
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    Journal Article Conference Proceeding
  11. 11
  12. 12

    Plasma-charging damage of floating MIM capacitors by Zhichun Wang, Ackaert, J., Salm, C., Kuper, F.G., Tack, M., De Backer, E., Coppens, P., Luc De Schepper, Vlachakis, B.

    Published in IEEE transactions on electron devices (01-06-2004)
    “…In this paper, the mechanism of plasma-charging damage (PCD) of metal-insulator-metal (MIM) capacitors as well as possible protection schemes are discussed. A…”
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    Journal Article
  13. 13

    Significance of including substrate capacitance in the full chip circuit model of ICs under CDM stress by Sowariraj, M.S.B., de Jong, P.C., Cora, S.M., Smedes, T., Mouthaan, A.J.T., Kuper, F.G.

    “…In the CDM type of ESD, the IC is both the source and part of the discharge current path. To study the CDM performance of an IC, a full-chip circuit model that…”
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    Conference Proceeding
  14. 14

    Wafer level reliability monitoring strategy of an advanced multi-process CMOS foundry by Scarpa, A., Tao, G., Kuper, F.G.

    “…In an advanced multi-process CMOS foundry it is strategically important to make use of an optimum reliability monitoring strategy, in order to be able to run…”
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    Conference Proceeding
  15. 15

    Impact of screening of latent defects at electrical test on the yield-reliability relation and application to burn-in elimination by Van der Pol, J.A., Ooms, E.R., Van 't Hof, T., Kuper, F.G.

    “…This paper addresses the question of under what conditions burn-in can be eliminated. Based on data of more than 30 million sold devices, the effect of…”
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    Conference Proceeding
  16. 16

    Fast thermal cycling-enhanced electromigration in power metallization by Nguyen, H.V., Salm, C., Krabbenborg, B.H., Bisschop, J., Mouthaan, A.J.T., Kuper, F.G.

    “…Multilevel interconnects used in power ICs are susceptible to short circuit failure due to a combination of fast thermal cycling and electromigration stresses…”
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    Magazine Article