Search Results - "Kroening, D."
-
1
A Survey of Automated Techniques for Formal Software Verification
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01-07-2008)“…The quality and the correctness of software are often the greatest concern in electronic systems. Formal verification tools can provide a guarantee that a…”
Get full text
Journal Article -
2
Reinforcement Learning for Temporal Logic Control Synthesis with Probabilistic Satisfaction Guarantees
Published in 2019 IEEE 58th Conference on Decision and Control (CDC) (01-12-2019)“…We present a model-free reinforcement learning algorithm to synthesize control policies that maximize the probability of satisfying high-level control…”
Get full text
Conference Proceeding -
3
Periodic Orbits and Equilibria in Glass Models for Gene Regulatory Networks
Published in IEEE transactions on information theory (01-02-2010)“…Glass models are frequently used to model gene regulatory networks. A distinct feature of the Glass model is that its dynamics can be formalized as paths…”
Get full text
Journal Article -
4
Computing Binary Combinatorial Gray Codes Via Exhaustive Search With SAT Solvers
Published in IEEE transactions on information theory (01-04-2008)“…The term binary combinatorial Gray code refers to a list of binary words such that the Hamming distance between two neighboring words is one and the list…”
Get full text
Journal Article -
5
Word-Level Predicate-Abstraction and Refinement Techniques for Verifying RTL Verilog
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01-02-2008)“…As a first step, most model checkers used in the hardware industry convert a high-level register-transfer-level (RTL) design into a netlist. However,…”
Get full text
Journal Article -
6
Word level predicate abstraction and refinement for verifying RTL Verilog
Published in Proceedings. 42nd Design Automation Conference, 2005 (2005)“…Model checking techniques applied to large industrial circuits suffer from the state space explosion problem. A major technique to address this problem is…”
Get full text
Conference Proceeding -
7
Automated pipeline design
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 38th conference on Design automation (01-01-2001)“…The interlock and forwarding logic is considered the tricky part of fully-featured piplined microprocessor and especially debugging these parts delays the…”
Get full text
Conference Proceeding -
8
Formal verification of SystemC by automatic hardware/software partitioning
Published in Proceedings of the 2nd ACM/IEEE International Conference on Formal Methods and Models for Co-Design (01-01-2005)“…Variants of general-purpose programming languages, like SystemC, are increasingly used to specify system designs that have both hardware and software parts…”
Get full text
Conference Proceeding -
9
A SAT-based algorithm for reparameterization in symbolic simulation
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 41st annual conference on Design automation; 07-11 June 2004 (07-06-2004)“…Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is…”
Get full text
Conference Proceeding -
10
Specifying and verifying systems with multiple clocks
Published in Proceedings 21st International Conference on Computer Design (2003)“…Multiple clock domains are a challenge for hardware specification and verification. We present a method for specifying the relations between multiple clocks,…”
Get full text
Conference Proceeding -
11
Computing Mutation Coverage in Interpolation-Based Model Checking
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01-05-2012)“…Coverage is a means to quantify the quality of a system specification, and is frequently applied to assess progress in system validation. Coverage is a…”
Get full text
Journal Article -
12
Test-case generation for embedded simulink via formal concept analysis
Published in 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC) (05-06-2011)“…Mutation testing suffers from the high computational cost of automated test-vector generation, due to the large number of mutants that can be derived from…”
Get full text
Conference Proceeding -
13
Computing Binary Combinatorial Gray Codes Via Exhaustive Search With SAT Solvers I It -I I I
Published in IEEE transactions on information theory (01-04-2008)“…The term binary combinatorial Gray code refers to a list of binary words such that the Hamming distance between two neighboring words is one and the list…”
Get full text
Journal Article -
14
Predicate Abstraction of ANSI-C Programs Using SAT
Published in Formal methods in system design (01-09-2004)“…Predicate abstraction is a major method for verification of software. However, the generation of the abstract Boolean program from the set of predicates and…”
Get full text
Journal Article -
15
Ligation-mediated PCR amplification of specific fragments from a Class-II restriction endonuclease total digest
Published in Nucleic acids research (01-05-1997)“…A method is described which permits the ligationmediated PCR amplification of specific fragments from a Class-II restriction endonuclease total digest…”
Get full text
Journal Article -
16
Behavioral consistency of C and verilog programs using bounded model checking
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 40th conference on Design automation; 02-06 June 2003 (02-06-2003)“…We present an algorithm that checks behavioral consistency between an ANSI-C program and a circuit given in Verilog using Bounded Model Checking. Both the…”
Get full text
Conference Proceeding -
17
Checking consistency of C and Verilog using predicate abstraction and induction
Published in IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004 (07-11-2004)“…It is common practice to write C models of circuits due to the greater simulation efficiency. Once the C program satisfies the requirements, the circuit is…”
Get full text
Conference Proceeding -
18
Verification of SpecC using predicate abstraction
Published in Proceedings of the Second ACM/IEEE International Conference on Formal Methods and Models for Co-Design (01-01-2004)“…Languages such as SystemC or SpecC offer a new design paradigm that addresses the industry's need for a fast time-to-market. However, formal verification…”
Get full text
Conference Proceeding -
19
Fault tolerance tradeoffs in moving from decentralized to centralized embedded systems
Published in International Conference on Dependable Systems and Networks, 2004 (2004)“…Some safety-critical distributed embedded systems may need to use centralized components to achieve certain dependability properties. The difficulty in…”
Get full text
Conference Proceeding -
20
Fixed points for multi-cycle path detection
Published in 2009 Design, Automation & Test in Europe Conference & Exhibition (01-04-2009)“…Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating…”
Get full text
Conference Proceeding