Search Results - "Krishna M., Kirthi"
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A Novel Carry-Look Ahead Approach to a Unified BCD and Binary Adder/Subtractor
Published in 21st International Conference on VLSI Design (VLSID 2008) (01-01-2008)“…Increasing prominence of commercial, financial and Internet-based applications, which process decimal data, there is an increasing interest in providing…”
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2
Efficient design of 32-bit comparator using carry look-ahead logic
Published in 2007 IEEE Northeast Workshop on Circuits and Systems (01-08-2007)“…The comparator is of paramount importance in many digital systems as it plays an important role in almost all hardware sorters. In this paper, the design of a…”
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Novel Architectures for High-Speed and Low-Power 3-2, 4-2 and 5-2 Compressors
Published in 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) (01-01-2007)“…The 3-2, 4-2 and 5-2 compressors are the basic components in many applications, in particular partial product summation in multipliers. In this paper novel…”
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Conference Proceeding -
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Novel High-Speed Redundant Binary to Binary converter using Prefix Networks
Published in 2007 IEEE International Symposium on Circuits and Systems (ISCAS) (01-05-2007)“…Fast addition and multiplication are of paramount importance in many arithmetic circuits and processors. The use of redundant number system for efficient…”
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A Novel Encoding Scheme for Delay and Energy Minimization in VLSI Interconnects with Built-In Error Detection
Published in 2008 IEEE Computer Society Annual Symposium on VLSI (01-04-2008)“…In deep sub-micron (DSM) technology, crosstalk noise and logic faults caused due to shrinking wire-size and reduced inter-wire spacing are major factors…”
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Novel, High-Speed 16-Digit BCD Adders Conforming to IEEE 754r Format
Published in IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07) (01-03-2007)“…In view of increasing prominence of commercial, financial and Internet-based applications that process data in decimal format, there is a renewed interest in…”
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A novel high-speed binary and gray Incrementer/Decrementer for an address generation unit
Published in 2007 International Conference on Industrial and Information Systems (01-08-2007)“…An incrementer/decrementer (INC/DEC) is a common building block in many digital systems like address generation unit which are used in microcontrollers and…”
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Conference Proceeding