Search Results - "Kossel, M"

Menisci protect chondrocytes from load-induced injury by Abusara, Z., Andrews, S. H. J., Von Kossel, M., Herzog, W.

“…Menisci in the knee joint are thought to provide stability, increased contact area, decreased contact pressures, and offer protection to the underlying…”
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Publisher Correction: Menisci protect chondrocytes from load-induced injury by Abusara, Z., Andrews, S. H. J., Von Kossel, M., Herzog, W.

“…A correction to this article has been published and is linked from the HTML and PDF versions of this paper. The error has been fixed in the paper…”
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A T-Coil-Enhanced 8.5 Gb/s High-Swing SST Transmitter in 65 nm Bulk CMOS With ≪ -16 dB Return Loss Over 10 GHz Bandwidth by Kossel, M., Menolfi, C., Weiss, J., Buchmann, P., von Bueren, G., Rodoni, L., Morf, T., Toifl, T., Schmatz, M.

“…A source-series-terminated (SST) transmitter in a 65 nm bulk CMOS technology is presented. The circuit exhibits an eye height greater than 1.0 V for data rates…”
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In vivo deformation of articular cartilage during electrically stimulated contraction by Abusara, Z, Kossel, M, Herzog, W

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A 22-gb/s PAM-4 receiver in 90-nm CMOS SOI technology by Toifl, T., Menolfi, C., Ruegg, M., Reutemann, R., Buchmann, P., Kossel, M., Morf, T., Weiss, J., Schmatz, M.L.

“…We report a receiver for four-level pulse-amplitude modulated (PAM-4) encoded data signals, which was measured to receive data at 22 Gb/s with a bit error rate…”
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LC PLL With 1.2-Octave Locking Range Based on Mutual-Inductance Switching in 45-nm SOI CMOS by Kossel, M., Morf, T., Weiss, J., Buchmann, P., Menolfi, C., Toifl, T., Schmatz, M.L.

“…A wideband LC PLL in 45-nm SOI CMOS technology is presented that has a center frequency of 12.4 GHz and 1.2 octave locking range. The wideband operation is…”
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30-40-GHz drain-pumped passive-mixer MMIC fabricated on VLSI SOI CMOS technology by Ellinger, F., Rodoni, L.C., Sialm, G., Kromer, C., von Buren, G., Schmatz, M.L., Menolfi, C., Toifl, T., Morf, T., Kossel, M., Jackel, H.

“…In this paper, a passive down mixer is proposed, which is well suited for short-channel field-effect transistor technologies. The authors believe that this is…”
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A 1.25-5 GHz Clock Generator With High-Bandwidth Supply-Rejection Using a Regulated-Replica Regulator in 45-nm CMOS by Toifl, T., Menolfi, C., Buchmann, P., Kossel, M., Morf, T., Schmatz, M.L.

“…A clock generator for high-speed chip-to-chip link receivers was implemented in a 45-nm CMOS SOI technology. A low sensitivity to supply voltage noise was…”
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Switched Inductor With Wide Tuning Range and Small Inductance Step Sizes by Kossel, M., Morf, T., Buchmann, P., Schmatz, M.L., Menolfi, C., Toifl, T.

“…A switched inductor based on mutual-inductance switching is proposed that aims at increasing the inductance tuning range as well as the number of inductance…”
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Traceable correction method for complex reflection coefficient using calculable air line impedance standards by Kossel, M., Leuchtmann, P., Rufenacht, J.

“…A correction method for the measurement of complex reflection coefficients using vector network analyzers is presented. The method is based on the invariance…”
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An active tagging system using circular-polarization modulation by Kossel, M.A., Kung, R., Benedickter, H., Biichtokd, W.

“…An active read/write microwave tagging system using circular-polarization modulation as a novel modulation scheme for radio-frequency identification systems is…”
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Microwave backscatter modulation systems by Kossel, M., Benedickter, H.R., Peter, R., Bachtold, W.

“…Backscatter modulation is frequently used in microwave tagging or sensor systems for interrogating remote devices. This paper describes, in the first part as…”
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A 28-Gb/s 4-Tap FFE/15-Tap DFE Serial Link Transceiver in 32-nm SOI CMOS Technology by Bulzacchelli, J. F., Menolfi, C., Beukema, T. J., Storaska, D. W., Hertle, J., Hanson, D. R., Ping-Hsuan Hsieh, Rylov, S. V., Furrer, D., Gardellini, D., Prati, A., Morf, T., Sharma, V., Kelkar, R., Ainspan, H. A., Kelly, W. R., Chieco, L. R., Ritter, G. A., Sorice, J. A., Garlett, J. D., Callan, R., Brandli, M., Buchmann, P., Kossel, M., Toifl, T., Friedman, D. J.

“…This paper presents a 28-Gb/s transceiver in 32-nm SOI CMOS technology for chip-to-chip communications over high-loss electrical channels such as backplanes…”
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A 5.9mW/Gb/s 7Gb/s/pin 8-lane single-ended RX with crosstalk cancellation scheme using a XCTLE and 56-tap XDFE in 32nm SOI CMOS by Cevrero, A., Aprile, C., Francese, P. A., Bapst, U., Menolfi, C., Braendli, M., Kossel, M., Morf, T., Kull, L., Yueksel, H., Oezkaya, I., Leblebici, Y., Cevher, V., Toifl, T.

“…This work reports an 8-lane single-ended RX featuring compact and low power far-end crosstalk (FEXT) cancellation circuits. The RX data-path consists of a…”
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A 2.6 mW/Gbps 12.5 Gbps RX With 8-Tap Switched-Capacitor DFE in 32 nm CMOS by Toifl, T., Menolfi, C., Ruegg, M., Reutemann, R., Dreps, D., Beukema, T., Prati, A., Gardellini, D., Kossel, M., Buchmann, P., Brandli, M., Francese, P. A., Morf, T.

“…A low-power receiver circuit in 32 nm SOI CMOS is presented, which is intended to be used in a source-synchronous link configuration. The design of the…”
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An active tagging system using circular polarization modulation by Kossel, M., Benedickter, H., Baechtold, W.

“…An active read/write microwave tagging system using circular polarization modulation as a novel modulation scheme for RFID systems to reduce demodulation…”
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Room-temperature THz imaging based on antenna-coupled MOSFET bolometer by Morf, T., Klein, B., Despont, M., Drechsler, U., Kull, L., Corcos, D., Elad, D., Kaminski, N., Braendli, M., Menolfi, C., Kossel, M., Francese, P. A., Toifl, T., Plettemeier, D.

“…We report on the design, fabrication and measurements of a new THz sensor concept based on an antenna-coupled MOSFET bolometer for room-temperature passive THz…”
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A multiphase PLL for 10 Gb/s links in SOI CMOS technology by Kossel, M., Morf, T., Baumberger, W., Biber, A., Menolfi, C., Toifl, T., Schmatz, M.

“…This paper presents a multiphase PLL designed for a 10/spl times/10 Gbit/s serial link bundle that is based on a digital CDR receiver. The PLL was fabricated…”
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A 3.1mW 8b 1.2GS/s single-channel asynchronous SAR ADC with alternate comparators for enhanced speed in 32nm digital SOI CMOS by Kull, L., Toifl, T., Schmatz, M., Francese, P. A., Menolfi, C., Braendli, M., Kossel, M., Morf, T., Andersen, T. M., Leblebici, Y.

“…Next-generation digital high-speed links require fast, yet energy-efficient ADCs at minimum area. Recent years saw impressive progress in SAR ADC designs…”
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@@iLC@ PLL With 1.2-Octave Locking Range Based on Mutual-Inductance Switching in 45-nm SOI CMOS by Kossel, M, Morf, T, Weiss, J, Buchmann, P, Menolfi, C, Toifl, T, Schmatz, M L

“…A wideband @@iLC@ PLL in 45-nm SOI CMOS technology is presented that has a center frequency of 12.4 GHz and 1.2 octave locking range. The wideband operation is…”
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