Search Results - "Kirsch, Paul"
-
1
MoS2 Field-Effect Transistors With Graphene/Metal Heterocontacts
Published in IEEE electron device letters (01-05-2014)Get full text
Journal Article -
2
Benchmarking Transition Metal Dichalcogenide MOSFET in the Ultimate Physical Scaling Limit
Published in IEEE electron device letters (01-03-2014)“…In this letter, we propose a nonplanar transition metal dichalcogenide (TMD) channel field effect transistor and explore its ballistic performance in the…”
Get full text
Journal Article -
3
STLM: A Sidewall TLM Structure for Accurate Extraction of Ultralow Specific Contact Resistivity
Published in IEEE electron device letters (01-09-2013)“…We propose a very large scale integration compatible, modified transfer length method (TLM) structure, called sidewall TLM, to minimize the effect of spreading…”
Get full text
Journal Article -
4
Mechanisms Limiting EOT Scaling and Gate Leakage Currents of High- k/Metal Gate Stacks Directly on SiGe
Published in IEEE electron device letters (01-03-2009)“…This letter addresses mechanisms responsible for a high gate leakage current ( Jg ) and a thick interfacial layer in the surface channel SiGe pFET enabling…”
Get full text
Journal Article -
5
Metal Electrode/High- k Dielectric Gate-Stack Technology for Power Management
Published in IEEE transactions on electron devices (01-01-2008)“…High- k dielectrics have been intensively investigated during the last decade, and their performance as a gate dielectric has been improved to the level of…”
Get full text
Journal Article -
6
Impact of Fin Doping and Gate Stack on FinFET (110) and (100) Electron and Hole Mobilities
Published in IEEE electron device letters (01-03-2012)“…Double-gate FinFET (110) (110) and (100) (100} electron mobility (μ e ) and hole mobility (μ h ) are experimentally investigated for the following: 1) a wide…”
Get full text
Journal Article -
7
Threshold Voltage Shift Due to Charge Trapping in Dielectric-Gated AlGaN/GaN High Electron Mobility Transistors Examined in Au-Free Technology
Published in IEEE transactions on electron devices (01-10-2013)“…We report on the investigation of the charge trapping characteristics of dielectric-gated AlGaN/GaN high electron mobility transistors (HEMTs) with atomic…”
Get full text
Journal Article -
8
Field-Effect Transistors With Graphene/Metal Heterocontacts
Published in IEEE electron device letters (01-05-2014)“…For the first time, n-type few-layer MoS 2 field-effect transistors (FETs) with graphene/Ti as the heterocontacts have been fabricated, showing more than…”
Get full text
Journal Article -
9
Mapping Defect Density in MBE Grown Epitaxial Layers on Si Substrate Using Esaki Diode Valley Characteristics
Published in IEEE transactions on electron devices (01-06-2014)“…Growing good quality III-V epitaxial layers on Si substrate is of utmost importance to produce next generation high-performance devices in a cost effective…”
Get full text
Journal Article -
10
on-State Performance Enhancement and Channel-Direction-Dependent Performance of a Biaxial Compressive Strained \hbox\hbox Quantum-Well pMOSFET Along \langle \hbox \rangle and \langle \hbox \rangle Channel Directions
Published in IEEE transactions on electron devices (01-04-2011)“…pMOSFET performance of high Ge content (~50%) biaxial compressive strained SiGe heterostructure channel pMOSFETs is characterized, and performance between 〈110…”
Get full text
Journal Article -
11
Electric-field-driven dielectric breakdown of metal-insulator-metal hafnium silicate
Published in Applied physics letters (10-12-2007)“…The breakdown characteristics of the crystalline and amorphous hafnium (Hf) silicates have been studied using metal-insulator-metal capacitors. It is found…”
Get full text
Journal Article -
12
Improved ge surface passivation with ultrathin SiOx enabling high-mobility surface channel pMOSFETs featuring a HfSiO/WN gate stack
Published in IEEE electron device letters (01-04-2007)Get full text
Journal Article -
13
Impact of Millisecond Flash-Assisted Rapid Thermal Annealing on SiGe Heterostructure Channel pMOSFETs With a High-k/Metal Gate
Published in IEEE transactions on electron devices (01-09-2011)“…Preserving the integrity (e.g., Ge concentration, strain, and lattice perfection) of pseudomorphically grown silicon germanium (SiGe) heterostructure channels…”
Get full text
Journal Article -
14
Improved 20nm device yield and gate dielectric integrity with optimized aluminum metal fill process
Published in 2016 27th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) (01-05-2016)“…Titanium-aluminum (TiAl) alloys are the industry standard source for work function tuning of High-K nMOS transistors in the gate-last process architecture…”
Get full text
Conference Proceeding Journal Article -
15
-
16
Characteristics of Gate Current Random Telegraph Signal Noise in SiON/HfO2/TaN p-Type Metal--Oxide--Semiconductor Field-Effect Transistors under Negative Bias Temperature Instability Stress Condition
Published in Jpn J Appl Phys (01-04-2010)“…Gate dielectric traps are becoming a major concern in the high-$k$/metal gate devices. In this paper, new experimental results and in-depth study on gate…”
Get full text
Journal Article -
17
Highly manufacturable advanced gate-stack technology for sub-45-nm self-aligned gate-first CMOSFETs
Published in IEEE transactions on electron devices (01-05-2006)“…Issues surrounding the integration of Hf-based high-/spl kappa/ dielectrics with metal gates in a conventional CMOS flow are discussed. The careful choice of a…”
Get full text
Journal Article -
18
-
19
The Effect of Nanoscale Nonuniformity of Oxygen Vacancy on Electrical and Reliability Characteristics of \hbox MOSFET Devices
Published in IEEE electron device letters (01-01-2008)“…To understand the influence of oxygen vacancies in on the electrical and reliability characteristics, we have investigated area-dependent leakage-current…”
Get full text
Journal Article -
20
Characterization of anti-phase boundaries in hetero-epitaxial polar-on-nonpolar semiconductor films by optical second-harmonic generation
Published in Applied physics letters (15-04-2013)“…Compound semiconductor layers (e.g., GaAs) grown on elemental semiconductor substrates (e.g., Si, Ge) are vulnerable to formation of anti-phase boundary (APB)…”
Get full text
Journal Article