Search Results - "Kim, Kwi Dong"
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A Dual-Channel Pipelined ADC With Sub-ADC Based on Flash-SAR Architecture
Published in IEEE transactions on circuits and systems. II, Express briefs (01-11-2012)“…This brief presents a 10-bit dual-channel pipelined flash-successive approximation register (SAR) analog-to-digital converter (ADC) for high-speed…”
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A Wide-Tuning Dual-Band Transformer-Based Complementary VCO
Published in IEEE microwave and wireless components letters (01-06-2010)“…A dual-band wide-tuning range complementary LC-VCO is reported that utilizes additive and subtractive coupling of transformer inductances. Complementary…”
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A 10-bit 400-MS/s 160-mW 0.13-μm CMOS dual-channel pipeline ADC without channel mismatch calibration
Published in IEEE journal of solid-state circuits (01-07-2006)Get full text
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MATERIAL DESIGN SCHEMES FOR SINGLE-TRANSISTOR-TYPE FERROELECTRIC MEMORY CELLS USING Pt/(Bi,La)4Ti3O12/ONO/Si STRUCTURES
Published in Jpn.J.Appl.Phys ,Part 1. Vol. 42, no. 11, pp. 6955-6959. 2003 (2003)“…Authors fabricated metal-ferroelectric-insulator-semiconductor (MFIS) structures using Bi3.465La0.85Ti3O12 (BLT) ferroelectric thin films and SiO2/Si3N4/SiO2…”
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A 10-bit 400-MS/s 160-mW 0.13-/spl mu/m CMOS dual-channel pipeline ADC without channel mismatch calibration
Published in IEEE journal of solid-state circuits (01-07-2006)“…This paper describes a 10-bit 400-MS/s dual-channel analog-to-digital converter (ADC) insensitive to offset, gain, and sampling-time mismatches between…”
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Fabrication of Ferroelectric Gate Memory Device Using BLT/HfO 2 /Si Gate Structure
Published in Integrated ferroelectrics (01-02-2003)Get full text
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Etching Mechanism of Ferroelectric Film Etched by Helicon Plasma Method
Published in Integrated ferroelectrics (01-01-2002)“…The etching behavior and properties of SBT (SrBi 2 Ta 2 O 9 ) thin films were investigated by varying the etching parameter such as gas mixing ratio in helicon…”
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Analysis of the electrical characteristics of novel ESD protection device with high holding voltage under various temperatures
Published in TENCON 2009 - 2009 IEEE Region 10 Conference (01-11-2009)“…The paper introduces a silicon controlled rectifier (SCR)-based device with high holding voltage for ESD power clamp. The holding voltage can be increased by…”
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Conference Proceeding
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The design of DC-DC converter with DT-CMOS for portable terminal
Published in TENCON 2009 - 2009 IEEE Region 10 Conference (01-11-2009)“…The high efficiency power management IC (PMIC) with switching device is presented in this paper. PMIC is controlled with PWM control method in order to have…”
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Conference Proceeding -
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A 9.15mW 0.22mm2 10b 204MS/s pipelined SAR ADC in 65nm CMOS
Published in IEEE Custom Integrated Circuits Conference 2010 (01-09-2010)“…This paper describes a 10b 204MS/s analog-to-digital converter (ADC) employing a pipelined successive approximation register (SAR) architecture for low power…”
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Conference Proceeding -
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A 105.5 dB, 0.49 mm2 Audio ΣΔ modulator using chopper stabilization and fully randomized DWA
Published in 2008 IEEE Custom Integrated Circuits Conference (01-09-2008)“…An audio S.modulator achieves 105.5 dB dynamic range over 20 kHz audio bandwidth. A chopper stabilization technique is used in both the first integrator and…”
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Conference Proceeding -
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A 4.7mW 0.32mm2 10b 30MS/s Pipelined ADC Without a Front-End S/H in 90nm CMOS
Published in 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (01-02-2007)“…A 4.7mW 10b 30MS/s pipelined ADC is implemented without a front-end S/H for low power consumption and small area. The prototype ADC, fabricated in a 90nm CMOS…”
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Conference Proceeding -
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A 5-mW 0.26-mm2 10-bit 20-MS/s Pipelined CMOS ADC with Multi-Stage Amplifier Sharing Technique
Published in 2006 Proceedings of the 32nd European Solid-State Circuits Conference (01-09-2006)“…This paper describes a 10-bit 20-Msample/s analog-to-digital converter (ADC) employing a multi-stage amplifier sharing scheme to reduce the power consumption…”
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Conference Proceeding -
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A 10b 205MS/s 1mm2 90nm CMOS Pipeline ADC for Flat-Panel Display Applications
Published in 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (01-02-2007)“…A 10b 205MS/S 1mm 2 ADC for flat-panel display applications is implemented in a 90nm CMOS process. The ADC with an LDO regulator achieves a 53dB PSRR for a…”
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Conference Proceeding -
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Material Design Schemes for Single-Transistor-Type Ferroelectric Memory Cells Using Pt/(Bi,La) 4 Ti 3 O 12 /ONO/Si Structures
Published in Japanese Journal of Applied Physics (01-11-2003)Get full text
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Fabrication of Ferroelectric Gate Memory Device Using BLT/HfO2/Si Gate Structure
Published in Integrated ferroelectrics (01-02-2003)“…Ferroelectric gate FET's with BLT/HfO 2 structure were fabricated on 5-inch-scale Si wafer using well-refined CMOS compatible 0.8 μm-based fabrication…”
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Fabrication of Ferroelectric Gate Memory Device Using BLT/HfO2/Si Gate Structure
Published in Integrated ferroelectrics (2003)“…Ferroelectric gate FET's with BLT/HfO2 structure were fabricated on 5-inch-scale Si wafer using well-refined CMOS compatible 0.8 *mm-based fabrication…”
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Journal Article