High performance pMOSFET with BF/sub 3/ plasma doped gate/source/drain and S/D extension

A BF/sub 3/ Plasma doping (PLAD) process has been utilized in source/drain/gate and shallow S/D extension for high performance 0.18 /spl mu/m pMOSFET. Gate oxide reliability, drain current, and transconductance of the pMOSFET with BF/sub 3/ PLAD are remarkably improved compared to those of BF/sub 2/...

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Bibliographic Details
Published in:International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217) pp. 639 - 642
Main Authors: Ha, J.M., Park, J.W., Kim, W.S., Kikm, S.P., Song, W.S., Kim, H.S., Song, H.J., Fujihara, K., Kang, H.K., Lee, M.Y., Felch, S., Jeong, U., Goeckner, M., Shim, K.H., Kim, H.J., Cho, H.T., Kim, Y.K., Ko, D.H., Lee, G.C.
Format: Conference Proceeding
Language:English
Published: IEEE 1998
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Summary:A BF/sub 3/ Plasma doping (PLAD) process has been utilized in source/drain/gate and shallow S/D extension for high performance 0.18 /spl mu/m pMOSFET. Gate oxide reliability, drain current, and transconductance of the pMOSFET with BF/sub 3/ PLAD are remarkably improved compared to those of BF/sub 2/ ion implanted devices. Cobalt salicide formation is also compatible with the plasma doped S/D junction.
ISBN:0780347749
9780780347748
ISSN:0163-1918
2156-017X
DOI:10.1109/IEDM.1998.746439