Search Results - "Keng Foo Lo"
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1
Correlation between Charge Pumping Method and Direct-Current Current Voltage Method in p-Type Metal-Oxide-Semiconductor Field-Effect Transistors
Published in Japanese Journal of Applied Physics (01-08-1999)“…In this study, the correlation between the charge pumping (CP) method and the direct-current current voltage (DCIV) method in p-type metal-oxide-semiconductor…”
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Journal Article -
2
Massively parallel GOI test
Published in IEEE International Integrated Reliability Workshop Final Report, 2003 (2003)“…Massively parallel GOI (gate oxide integrity) Vramp tests offer a fast method, capable of testing 6 test structures on a single touchdown of the probe card…”
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Conference Proceeding -
3
Wafer level electromigration testing on via/line structure with a poly-heated method in comparison to standard package level tests
Published in Proceedings of the 10th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2003 (2003)“…In this study, we present data from alternative wafer level EM technique, poly-heated electromigration test on via chain structure. We show that there is a…”
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Conference Proceeding -
4
Step like degradation profile of electromigration of W-plug contact
Published in Proceedings of the IEEE 1999 International Interconnect Technology Conference (Cat. No.99EX247) (1999)“…The electromigration (EM) of a W-plug contact to silicon has been investigated by high resolution resistance measurement (HRRM). Step-like resistance…”
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Conference Proceeding -
5
Wafer-level electromigration reliability test for deep-submicron interconnect metallization
Published in Proceedings 1998 Hong Kong Electron Devices Meeting (Cat. No.98TH8368) (1998)“…An automatic Wafer-level Electromigration Test (WET) System with interactive interface was developed. The WET System has the advantages of reduced stressing…”
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Conference Proceeding -
6
Gate oxide integrity improvement by optimising poly deposition process
Published in IEEE International Integrated Reliability Workshop Final Report, 2004 (2004)“…The gate oxide integrity of oxide thickness 13.5 nm has been studied for different amorphous poly deposition conditions. The poly grain was varied by the poly…”
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Conference Proceeding -
7
The study of sputtered RF Ta on the PID in Cu dual damascene technology [plasma induced damage]
Published in IEEE International Integrated Reliability Workshop Final Report, 2004 (2004)“…Different recipes of barrier metal using a sputtered Ta process in 0.13 /spl mu/m dual gate oxide are developed. Low-throughput RF Ta, baseline Ta and…”
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Conference Proceeding -
8
Studies on X-ray reflectivity technique and application in thickness measurements in wafer fabrication
Published in 2004 IEEE International Conference on Semiconductor Electronics (2004)“…In advanced ULSI technologies, 90nm and beyond, ultra-thin materials play a key role in device performance and its reliability. Conventional optical…”
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Conference Proceeding -
9
Failure analysis of bondpads peeling problem in 0.13 /spl mu/m copper process in wafer fabrication
Published in 2004 IEEE International Conference on Semiconductor Electronics (2004)“…A bondpad peeling case due to passivation residue is presented for 0.13 /spl mu/m copper process in wafer fabrication (fab). It was reported that some dies…”
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Conference Proceeding -
10
A latch-up immunized lateral trench-gate conductivity modulated power transistor
Published in Proceedings of the 1999 7th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.99TH8394) (1999)“…In this paper, a latch-up immunized lateral trench-gate bipolar transistor (LTGBT) is presented, along with its numerical simulations and experimental results…”
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Conference Proceeding -
11
A study on surface charging reduction in Auger electron spectroscopy
Published in 2004 IEEE International Conference on Semiconductor Electronics (2004)“…In this paper, a simple method of charge reduction on the surface of an insulating sample and its usefulness in the analysis of Auger electron spectroscopy…”
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Conference Proceeding -
12
Applications of XRD and TOF-SIMS in failure analysis of SiGe epi wafer
Published in 2004 IEEE International Conference on Semiconductor Electronics (2004)“…In a BiCMOS process, interface quality of SiGe base region determines the performance of heterojunction bipolar transistor. At present, in wafer fabrication,…”
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Conference Proceeding -
13
Failure analysis of discolored and nonstick Al bondpad during wafer sorting process
Published in 2004 IEEE International Conference on Semiconductor Electronics (2004)“…In this paper, a discolored and nonstick bondpad case due to Si dust contamination is discussed. It was found that discoloration surrounded the probe mark…”
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Conference Proceeding -
14
Application of Auger electron spectroscopy (AES), TEM electron energy loss spectrum (EELS) in failure analysis on poly grooves issue in wafer fabrication
Published in 2004 IEEE International Conference on Semiconductor Electronics (2004)“…In this paper, a case study on the failure analysis and yield enhancement on poly grooves/divots in wafer fabrication was investigated and studied. Several…”
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Conference Proceeding -
15
Effect of new processes of inter-layer-dielectric on plasma charging damage in 0.13/spl mu/ dual gate oxide
Published in IEEE International Integrated Reliability Workshop Final Report, 2003 (2003)“…New processes of Inter-Layer-Dielectric (ILD) in 0.13/spl mu/m dual gate oxide have been developed. Etch stop liner (ESL) changes from single stack SiN to dual…”
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Conference Proceeding -
16
A study of high current characteristics of devices in a 0.13µm CMOS technology
Published in 2002 Electrical Overstress/Electrostatic Discharge Symposium (01-10-2002)“…This paper evaluates the high current performance of several devices in 0.13µm CMOS process as function of layout parameters using transmission line pulse…”
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Conference Proceeding -
17
Impact of test structure design on electromigration of metal interconnect
Published in Proceedings of the 1999 7th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.99TH8394) (1999)“…The impact of test structure design on the electromigration (EM) lifetime of metal interconnects has been investigated using high resolution resistance…”
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Conference Proceeding -
18
Impact of failure criteria on electromigration of W-plug contact
Published in Proceedings of the 1999 7th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.99TH8394) (1999)“…This work presents an investigation of the impact of failure criteria on electromigration of a W-plug contact by using high resolution resistance measurement…”
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Conference Proceeding