Search Results - "Keller, Ben"

NIHAO – IV: core creation and destruction in dark matter density profiles across cosmic time by Tollet, Edouard, Macciò, Andrea V., Dutton, Aaron A., Stinson, Greg S., Wang, Liang, Penzo, Camilla, Gutcke, Thales A., Buck, Tobias, Kang, Xi, Brook, Chris, Di Cintio, Arianna, Keller, Ben W., Wadsley, James

“…We use the NIHAO (Numerical Investigation of Hundred Astrophysical Objects) cosmological simulations to investigate the effects of baryonic physics on the time…”
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NIHAO project – I. Reproducing the inefficiency of galaxy formation across cosmic time with a large sample of cosmological hydrodynamical simulations by Wang, Liang, Dutton, Aaron A., Stinson, Gregory S., Macciò, Andrea V., Penzo, Camilla, Kang, Xi, Keller, Ben W., Wadsley, James

“…We introduce project Nihao (Numerical Investigation of a Hundred Astrophysical Objects), a set of 100 cosmological zoom-in hydrodynamical simulations performed…”
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NIHAO project II: halo shape, phase-space density and velocity distribution of dark matter in galaxy formation simulations by Butsky, Iryna, Macciò, Andrea V., Dutton, Aaron A., Wang, Liang, Obreja, Aura, Stinson, Greg S., Penzo, Camilla, Kang, Xi, Keller, Ben W., Wadsley, James

“…We use the NIHAO (Numerical Investigation of Hundred Astrophysical Objects) cosmological simulations to study the effects of galaxy formation on key properties…”
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Properties of Compact Faint Radio Sources as a Function of Angular Size from Stacking by Johnston, Ryan S., Stil, Jeroen M., Keller, Ben W.

“…Abstract The polarization properties of radio sources powered by an Active Galactic Nucleus (AGN) have attracted considerable attention because of the…”
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Erratum: NIHAO IV: core creation and destruction in dark matter density profiles across cosmic time by Tollet, Edouard, Macciò, Andrea V, Dutton, Aaron A, Stinson, Greg S, Wang, Liang, Penzo, Camilla, Gutcke, Thales A, Buck, Tobias, Kang, Xi, Brook, Chris, Di Cintio, Arianna, Keller, Ben W, Wadsley, James

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A Dual-Core RISC-V Vector Processor With On-Chip Fine-Grain Power Management in 28-nm FD-SOI by Wright, John Charles, Schmidt, Colin, Keller, Ben, Dabbelt, Daniel Palmer, Kwak, Jaehwa, Iyer, Vighnesh, Mehta, Nandish, Chiu, Pi-Feng, Bailey, Stevo, Asanovic, Krste, Nikolic, Borivoje

“…This work demonstrates a dual-core RISC-V system-on-chip (SoC) with integrated fine-grain power management. The 28-nm fully depleted silicon-on-insulator…”
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Detection Thresholds and Bias Correction in Polarized Intensity by George, Samuel J., Stil, Jeroen M., Keller, Ben W.

“…Detection thresholds in polarized intensity and polarization bias correction are investigated for surveys where the polarization information is obtained from…”
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Star formation and ISM morphology in tidally induced spiral structures by Pettitt, Alex R., Tasker, Elizabeth J., Wadsley, James W., Keller, Ben W., Benincasa, Samantha M.

“…Abstract Tidal encounters are believed to be one of the key drivers of galactic spiral structure in the Universe. Such spirals are expected to produce…”
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THE AGORA HIGH-RESOLUTION GALAXY SIMULATIONS COMPARISON PROJECT. II. ISOLATED DISK TEST by Kim, Ji-hoon, Agertz, Oscar, Teyssier, Romain, Butler, Michael J., Ceverino, Daniel, Choi, Jun-Hwan, Feldmann, Robert, Keller, Ben W., Lupi, Alessandro, Quinn, Thomas, Revaz, Yves, Wallace, Spencer, Gnedin, Nickolay Y., Leitner, Samuel N., Shen, Sijing, Smith, Britton D., Thompson, Robert, Turk, Matthew J., Abel, Tom, Arraki, Kenza S., Benincasa, Samantha M., Chakrabarti, Sukanya, DeGraf, Colin, Dekel, Avishai, Goldbaum, Nathan J., Hopkins, Philip F., Hummels, Cameron B., Klypin, Anatoly, Li, Hui, Madau, Piero, Mandelker, Nir, Mayer, Lucio, Nagamine, Kentaro, Nickerson, Sarah, O'Shea, Brian W., Primack, Joel R., Roca-Fàbrega, Santi, Semenov, Vadim, Shimizu, Ikkoh, Simpson, Christine M., Todoroki, Keita, Wadsley, James W., Wise, John H.

“…ABSTRACT Using an isolated Milky Way-mass galaxy simulation, we compare results from nine state-of-the-art gravito-hydrodynamics codes widely used in the…”
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572 PYX-102, an anti-KLRG1 antibody, enhances cytotoxic activity of CD8-T-cells from PBMC and human tumor samples by blocking the interaction between KLRG1 and cadherins by Yasuda, Kei, Diao, Liyang, Feng, Jianwen, Iovino, Matthew, Lewandowski, Sara, Rodriguez, Anthony, Steiner, Philipp, Felitsky, Dan, Herbst, Ronald, Keller, Ben, Miller, Ona, Quigley, Alyssa, Pinkas, Jan

“…BackgroundKLRG1 is an inhibitory receptor expressed on T and NK-cells. On CD8-T-cells, KLRG1 is expressed on highly differentiated antigen-specific effector…”
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Accelerating Chip Design With Machine Learning by Khailany, Brucek, Ren, Haoxing, Dai, Steve, Godil, Saad, Keller, Ben, Kirby, Robert, Klinefelter, Alicia, Venkatesan, Rangharajan, Zhang, Yanqing, Catanzaro, Bryan, Dally, William J.

“…Recent advancements in machine learning provide an opportunity to transform chip design workflows. We review recent research applying techniques such as deep…”
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A 0.32-128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm by Zimmer, Brian, Venkatesan, Rangharajan, Shao, Yakun Sophia, Clemons, Jason, Fojtik, Matthew, Jiang, Nan, Keller, Ben, Klinefelter, Alicia, Pinckney, Nathaniel, Raina, Priyanka, Tell, Stephen G., Zhang, Yanqing, Dally, William J., Emer, Joel S., Gray, C. Thomas, Keckler, Stephen W., Khailany, Brucek

“…Custom accelerators improve the energy efficiency, area efficiency, and performance of deep neural network (DNN) inference. This article presents a scalable…”
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PRIMAL: Power Inference using Machine Learning by Zhou, Yuan, Ren, Haoxing, Zhang, Yanqing, Keller, Ben, Khailany, Brucek, Zhang, Zhiru

“…This paper introduces PRIMAL, a novel learning-based frame-work that enables fast and accurate power estimation for ASIC designs. PRIMAL trains machine…”
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A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm by Keller, Ben, Venkatesan, Rangharajan, Dai, Steve, Tell, Stephen G., Zimmer, Brian, Sakr, Charbel, Dally, William J., Gray, C. Thomas, Khailany, Brucek

“…The energy efficiency of deep neural network (DNN) inference can be improved with custom accelerators. DNN inference accelerators often employ specialized…”
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MAGNet: A Modular Accelerator Generator for Neural Networks by Venkatesan, Rangharajan, Raina, Priyanka, Zhang, Yanqing, Zimmer, Brian, Dally, William J., Emer, Joel, Keckler, Stephen W., Khailany, Brucek, Shao, Yakun Sophia, Wang, Miaorong, Clemons, Jason, Dai, Steve, Fojtik, Matthew, Keller, Ben, Klinefelter, Alicia, Pinckney, Nathaniel

“…Deep neural networks have been adopted in a wide range of application domains, leading to high demand for inference accelerators. However, the high cost…”
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A Pausible Bisynchronous FIFO for GALS Systems by Keller, Ben, Fojtik, Matthew, Khailany, Brucek

“…Many of the challenges of modern SoC design can be mitigated or eliminated with globally asynchronous, locally synchronous (GALS) design techniques…”
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IPA: Floorplan-Aware SystemC Interconnect Performance Modeling and Generation for HLS-based SoCs by Pinckney, Nathaniel, Venkatesan, Rangharajan, Keller, Ben, Khailany, Brucek

“…High-level synthesis (HLS) has recently been used to improve design productivity for many units in today's complex SoCs. HLS tools and flows improve chip…”
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A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI by Zimmer, Brian, Lee, Yunsup, Puggelli, Alberto, Kwak, Jaehwa, Jevtic, Ruzica, Keller, Ben, Bailey, Steven, Blagojevic, Milovan, Chiu, Pi-Feng, Le, Hanh-Phuc, Chen, Po-Hung, Sutardja, Nicholas, Avizienis, Rimas, Waterman, Andrew, Richards, Brian, Flatresse, Philippe, Alon, Elad, Asanovic, Krste, Nikolic, Borivoje

“…This work demonstrates a RISC-V vector microprocessor implemented in 28 nm FDSOI with fully integrated simultaneous-switching switched-capacitor DC-DC (SC…”
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An Agile Approach to Building RISC-V Microprocessors by Yunsup Lee, Waterman, Andrew, Cook, Henry, Zimmer, Brian, Keller, Ben, Puggelli, Alberto, Kwak, Jaehwa, Jevtic, Ruzica, Bailey, Stevo, Blagojevic, Milovan, Pi-Feng Chiu, Avizienis, Rimas, Richards, Brian, Bachrach, Jonathan, Patterson, David, Alon, Elad, Nikolic, Bora, Asanovic, Krste

“…The final phase of CMOS technology scaling provides continued increases in already vast transistor counts, but only minimal improvements in energy efficiency,…”
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Problem C: GPU Accelerated Logic Re-simulation : (Invited Talk) by Zhang, Yanqing, Ren, Haoxing, Keller, Ben, Khailany, Brucek

“…Logic "re" -simulation can be defined as gate level simulation where the input waveforms at every primary input and pseudo-primary input (such as register/RAM…”
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