Search Results - "Kee-Won Kwon"
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1
Fast and Efficient Offset Compensation by Noise-Aware Pre-Charge and Operation of DRAM Bit Line Sense Amplifier
Published in IEEE transactions on circuits and systems. II, Express briefs (01-04-2023)“…This brief proposes fast and efficient offset compensation for a DRAM bit-line sense amplifier. Precharging the sense amplifier under the same conditions as…”
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2
Charge Pumping Technique to Measure Polarization Switching Charges of FeFETs
Published in IEEE transactions on electron devices (01-09-2022)“…This study proposes a new method to measure the polarization charge of ferroelectric field-effect transistors (FeFETs) using a pulse generator and source…”
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3
A Highly Linear Neuromorphic Synaptic Device Based on Regulated Charge Trap/Detrap
Published in IEEE electron device letters (01-11-2019)“…In this letter, we present highly linear potentiation/depression behaviors of a neuromorphic synaptic device made of CMOS-compatible floating gate (FG) cells…”
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4
A Study of Read Margin Enhancement for 3T2R Nonvolatile TCAM Using Adaptive Bias Training
Published in IEEE transactions on very large scale integration (VLSI) systems (01-08-2019)“…In this paper, we propose an adaptive-bias-training circuit for enhancing the read reliability of ternary content-addressable memory (TCAM), which is…”
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5
Implementation of an On-Chip Learning Neural Network IC Using Highly Linear Charge Trap Device
Published in IEEE transactions on circuits and systems. I, Regular papers (01-07-2021)“…This paper presents an IC implementation of on-chip learning neural network accelerator using highly linear CMOS-compatible floating gate charge trap devices…”
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6
A 4-GHz Sub-Harmonically Injection-Locked Phase-Locked Loop With Self-Calibrated Injection Timing and Pulsewidth
Published in IEEE journal of solid-state circuits (01-10-2020)“…A 4-GHz sub-harmonically injection-locked phase-locked loop (ILPLL) with on-chip calibration is presented. The injection timing and pulsewidth of the injected…”
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7
Power Efficient and Reliable Nonvolatile TCAM With Hi-PFO and Semi-Complementary Driver
Published in IEEE transactions on circuits and systems. I, Regular papers (01-02-2019)“…In this paper, we propose a high priority first out (HiPFO) architecture of ternary content addressable memory (TCAM) to extend functions, not only "data…”
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8
A Reliable 2T2MTJ Nonvolatile Static Gain Cell STT-MRAM With Self-Referencing Sensing Circuits for Embedded Memory Application
Published in IEEE transactions on magnetics (01-04-2016)“…This paper presents a reliable nonvolatile static gain cell made of two transistors and two magneto-tunneling junctions (MTJs) for cache memory application…”
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9
Employment of a bi-layer of Ni(P)/Cu as a diffusion barrier in a Cu/Sn/Cu bonding structure for three-dimensional interconnects
Published in Acta materialia (01-10-2013)“…This study explored the possibility of employing a bi-layer barrier of electroless-plated Ni(P)/thin Cu layers in a Cu/Sn/Cu bonding structure for…”
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10
Self-aligned top-gate amorphous gallium indium zinc oxide thin film transistors
Published in Applied physics letters (04-08-2008)“…We have demonstrated a self-aligned top-gate amorphous gallium indium zinc oxide thin film transistor ( a -GIZO TFT). It had a field effect mobility of 5 cm…”
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11
Source/Drain Series-Resistance Effects in Amorphous Gallium-Indium Zinc-Oxide Thin Film Transistors
Published in IEEE electron device letters (01-08-2008)“…In this letter, we investigated the effects of source/drain series resistance on amorphous gallium-indium-doped zinc-oxide (a-GIZO) thin film transistors…”
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12
Modeling of Parasitic Fringing Capacitance in Multifin Trigate FinFETs
Published in IEEE transactions on electron devices (01-05-2013)“…In this brief, we analyze the effects of geometrical parameters on the parasitic fringing capacitance of sub 22-nm multifin FinFETs. An analytical model is…”
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13
Local NOR and global NAND match-line architecture for high performance CAM
Published in 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS) (01-08-2017)“…Locally NOR and globally NAND match-line architecture and sensing circuits applicable to the high performance content addressable memory(CAM) is proposed in…”
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Conference Proceeding -
14
A Fast and Reliable Cross-Point Three-State/Cell ReRAM
Published in IEEE transactions on very large scale integration (VLSI) systems (01-05-2017)“…We present a fast and reliable fully integrated cross-point three-state cell resistive random access memory. We accomplish swift back-and-forth hopping among…”
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15
A 5.2-Gb/s Low-Swing Voltage-Mode Transmitter With an AC-/DC-Coupled Equalizer and a Voltage Offset Generator
Published in IEEE transactions on circuits and systems. I, Regular papers (01-01-2014)“…This paper describes a voltage-mode transmitter with an AC-/DC-coupled equalizer. A dual-loop regulator controls the tap-weight coefficient for the DC-coupled…”
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16
A Dual Charge Pump for Quiescent Touch Sensor Power Supply
Published in IEEE transactions on circuits and systems. II, Express briefs (01-11-2012)“…This brief presents a dual charge pump suitable for touch sensor power supply applications, where a calm standby voltage as well as quick recovery from…”
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17
Power-Efficient Fast Write and Hidden Refresh of ReRAM Using an ADC-Based Sense Amplifier
Published in IEEE transactions on circuits and systems. II, Express briefs (01-11-2013)“…An ADC-based current-mode sense amplifier and its usage to improve speed, power efficiency, and reliability of ReRAM are proposed. The adaptive step-size…”
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18
A 6.4-Gb/s Voltage-Mode Near-Ground Receiver With a One-Tap Data and Edge DFE
Published in IEEE transactions on circuits and systems. II, Express briefs (01-06-2014)“…A low-power receiver with a one-tap data and edge decision-feedback equalizer (DFE) and a clock recovery circuit is presented. The receiver employs analog…”
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A Study on the Breakdown Mechanism of an Electroless-Plated Ni(P) Diffusion Barrier for Cu/Sn/Cu 3D Interconnect Bonding Structures
Published in Journal of electronic materials (01-01-2012)“…This study examined the thermal stability of an electroless-plated Ni(P) barrier layer inserted between Sn and Cu in the bonding structure of Cu/Sn/Cu for…”
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Journal Article Conference Proceeding -
20
Low Power Search Engine using Non-volatile Memory based TCAM with Priority Encoding and Selective Activation of Search Line and Match Line
Published in 2018 IEEE International Symposium on Circuits and Systems (ISCAS) (01-05-2018)“…Ternary Content Addressable Memory (TCAM) is emerging as a hardware solution for high performance router by supporting an internal routing table for fast…”
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Conference Proceeding