Search Results - "Kaushik, B K"

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  1. 1

    Analysis of Delay and Dynamic Crosstalk in Bundled Carbon Nanotube Interconnects by Majumder, Manoj Kumar, Kaushik, B. K., Manhas, Sanjeev Kumar

    “…Mixed carbon nanotube bundles (MCBs) are considered to be highly potential interconnect solutions in the current nanoscale regime. Different MCBs with random…”
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    Journal Article
  2. 2

    Performance analysis of multilayer graphene nanoribbon (MLGNR) interconnects by Rai, Mayank Kumar, Chatterjee, Ashoke Kumar, Sarkar, Sankar, Kaushik, B. K.

    Published in Journal of computational electronics (01-06-2016)
    “…This paper addresses the impact of interlayer resistance due to c-axis resistivity and contact resistance on performance in terms of delay, power dissipation…”
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    Journal Article
  3. 3

    Temperature-Dependent Modeling and Crosstalk Analysis in Mixed Carbon Nanotube Bundle Interconnects by Rai, Mayank Kumar, Garg, Harsh, Kaushik, B. K.

    Published in Journal of electronic materials (01-08-2017)
    “…The temperature-dependent circuit modeling and performance analysis in terms of crosstalk in capacitively coupled mixed carbon nanotube bundle (MCB)…”
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    Journal Article
  4. 4

    Temperature-dependent crosstalk between adjacent MLGNR interconnects of different dimensions and its impact on gate oxide reliability by Sidhu, Ramneek, Rai, Mayank Kumar, Kaushik, B. K.

    Published in Journal of computational electronics (01-03-2020)
    “…A comprehensive analysis is carried out herein on the impact of the interconnect geometry with nanoscale dimensions on the crosstalk-induced gate oxide…”
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    Journal Article
  5. 5

    Analysis of MWCNT and Bundled SWCNT Interconnects: Impact on Crosstalk and Area by Majumder, M. K., Pandya, N. D., Kaushik, B. K., Manhas, S. K.

    Published in IEEE electron device letters (01-08-2012)
    “…Multiwalled carbon nanotube (MWCNT) and bundled single-walled carbon nanotube (SWCNT) interconnect have provided potentially attractive solution in current…”
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    Journal Article
  6. 6

    Temperature‐dependent modeling and performance analysis of coupled MLGNR interconnects by Rai, Mayank Kumar, Arora, Shubham, Kaushik, B.K.

    “…The temperature‐dependent circuit modeling and performance in terms of propagation delay, power dissipation, and crosstalk‐induced voltage waveform at the far…”
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    Journal Article
  7. 7

    Effects of process variation in VLSI interconnects - a technical review by Verma, K.G, Kaushik, B.K, Singh, R

    Published in Microelectronics international (31-07-2009)
    “…Purpose - Process variation has become a major concern in the design of many nanometer circuits, including interconnect pipelines. The purpose of this paper is…”
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    Journal Article
  8. 8

    Static and dynamic analysis of organic and hybrid inverter circuits by Kumar, Brijesh, Kaushik, B. K., Negi, Y. S.

    Published in Journal of computational electronics (01-12-2013)
    “…This paper explores the possibility of organic-inorganic inverter circuits starting with independent designs of organic thin film transistors. Simulated I – V…”
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    Journal Article
  9. 9

    Bus encoder design for crosstalk and power reduction in RLC modelled VLSI interconnects by Verma, S K, Kaushik, B K

    “…Purpose – This paper aims to reduce the worst-case crosstalk effects for resistance, inductance and capacitance (RLC) interconnects using the bus encoding…”
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    Journal Article
  10. 10

    Voltage scaling - a novel approach for crosstalk reduction in global VLSI interconnects by Kaushik, B.K, Sarkar, S, Agarwal, R.P, Joshi, R.C

    Published in Microelectronics international (01-01-2007)
    “…Purpose - To analyze the effect of voltage scaling on crosstalk.Design methodology approach - Voltage scaling has been often used for reducing power…”
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    Journal Article
  11. 11

    Channel length variation effect on performance parameters of organic field effect transistors by Mittal, Poornima, Kumar, B., Negi, Y.S., Kaushik, B.K., Singh, R.K.

    Published in Microelectronics (01-12-2012)
    “…This research paper analyzes, finite element based two dimensional device simulations for top and bottom contact organic field effect transistors (OFETs) by…”
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    Journal Article
  12. 12

    VLSI interconnects and their testing: prospects and challenges ahead by Sharma, D K, Kaushik, B K, Sharma, R K

    “…Purpose - The purpose of this paper is to explore the functioning of very-large-scale integration (VLSI) interconnects and modeling of interconnects and…”
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    Journal Article
  13. 13

    Multiple relaxation investigations in polyetherimide: Thermally stimulated depolarization current technique by Singh, Randhir, Kaushik, B K, Quamara, J K

    Published in Indian journal of pure & applied physics (01-02-2008)
    “…Thermally stimulated depolarization current (TSDC) technique has been used for investigating various dielectric relaxation processes in polyetherimide. The TSD…”
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    Journal Article
  14. 14

    Boundary scan based testing algorithm to detect interconnect faults in printed circuit boards by Sharma, D.K., Sharma, R.K., Kaushik, B.K., Kumar, Pankaj

    Published in Circuit world (01-01-2011)
    “…Purpose - This paper aims to address the various issues of board-level (off-chip) interconnects testing. A new algorithm based on the boundary scan…”
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    Journal Article
  15. 15

    Analytical modeling and parameter extraction of top and bottom contact structures of organic thin film transistors by Kumar, Brijesh, Kaushik, B.K., Negi, Y.S., Saxena, S., Varma, G.D.

    Published in Microelectronics (01-09-2013)
    “…This paper proposes a structure based model of an organic thin film transistor (OTFT) and analyzes its device physics. The analytical model is developed for…”
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    Journal Article
  16. 16

    Optimized quantum implementation of novel controlled adders/subtractors by Bhat, Hilal A., Khanday, Farooq A., Kaushik, B. K.

    Published in Quantum information processing (16-04-2023)
    “…Designing quantum arithmetic logic unit, quantum full adder and quantum full subtractor are the most vital digital circuits. The paper first presents the…”
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    Journal Article
  17. 17

    Analysis of video analytic architectures by Purohit, Manoj, Kaushik, B. K., Singh, Manvendra, Kumar, Ajay

    “…Video technology is changing rapidly due to the advancement in the sensor technology, transmission bandwidth, higher storage capability and availability of…”
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    Conference Proceeding
  18. 18

    Memoryless nonlinearity in IT JL FinFET with spacer technology: Investigation towards reliability by Vandana, B., Mohapatra, S.K., Das, J.K., Pradhan, K.P., Kundu, A., Kaushik, B.K.

    Published in Microelectronics and reliability (01-04-2021)
    “…This work investigates the reliability assessment of high-k spacer and the effect of temperature on the device analog/RF performance for Inverted ‘T' (IT)…”
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    Journal Article
  19. 19

    Statistical variability and sensitivity analysis of dual-k spacer FinFET device-circuit co-design by Pal, Pankaj Kumar, Verma, Shivam, Kaushik, B. K., Dasgupta, S.

    “…High-ft spacer materials have been extensively researched for the suppression of short-channel effects (SCEs) in nano-scaled devices. However, the exorbitant…”
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    Conference Proceeding
  20. 20

    Effect of contact thickness on electrical properties of Organic Thin Film Transistors by Saxena, Shradha, Kumar, Brijesh, Kaushik, B. K., Negi, Y. S.

    “…This research paper analyses the electrical performance of various structures of Organic Thin Film Transistors (OTFTs) based upon their current-voltage…”
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    Conference Proceeding