Search Results - "Kaja, Endri"

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  1. 1

    PaGoRi:A Scalable Parallel Golomb-Rice Decoder by Vaddeboina, Mounika, Kaja, Endri, Yilmazer, Alper, Ghosh, Uttal, Ecker, Wolfgang

    “…Deep Neural Networks (DNNs) have created opportunities to address real-world issues and expand the application of Artificial Intelligence (AI). Despite…”
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    Conference Proceeding
  2. 2

    Parallel Golomb-Rice Decoder with 8-bit Unary Decoding for Weight Compression in TinyML Applications by Vaddeboina, Mounika, Kaja, Endri, Yilmayer, Alper, Prebeck, Sebastian, Ecker, Wolfgang

    “…Due to the recent advances in AI, the requirement for Artificial Intelligence (AI) has increased exponentially in the domain of Internet of Things (IoT)…”
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    Conference Proceeding
  3. 3

    Fake Timer: An Engine for Accurate Timing Estimation in Register Transfer Level Designs by Lopera, Daniela Sanchez, Kunzelmann, Robert Niklas, Kaja, Endri, Ecker, Wolfgang

    “…Despite advances in register-transfer level (RTL) synthesis tools, the quality of synthesized netlists still relies on the RTL micro-architecture. This often…”
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    Conference Proceeding
  4. 4

    An Automated Exhaustive Fault Analysis Technique guided by Processor Formal Verification Methods by Kaja, Endri, Gerlin, Nicolas, Zhao, Bihan, Lopera, Daniela Sanchez, Halabi, Jad Al, Khan, Azam Sher, Prebeck, Sebastian, Stoffel, Dominik, Kunz, Wolfgang, Ecker, Wolfgang

    “…As digital designs become increasingly complex, it is essential to have reliable and automated safety verification techniques. To mitigate the negative impact…”
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    Conference Proceeding
  5. 5

    Bits, Flips and RISCs by Gerlin, Nicolas, Kaja, Endri, Vargas, Fabian, Lu, Li, Breitenreiter, Anselm, Chen, Junchao, Ulbricht, Markus, Gomez, Maribel, Tahiraga, Ares, Prebeck, Sebastian, Jentzsch, Eyck, Krstic, Milos, Ecker, Wolfgang

    “…Electronic systems can be submitted to hostile environments leading to bit-flips or stuck-at faults and, ultimately, a system malfunction or failure. In…”
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    Conference Proceeding
  6. 6

    ISA Modeling with Trace Notation for Context Free Property Generation by Devarajegowda, Keerthikumara, Kaja, Endri, Prebeck, Sebastian, Ecker, Wolfgang

    “…The scalable and extendable RISC-V ISA introduced a new level of flexibility in designing highly customizable processors. This flexibility in processor designs…”
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    Conference Proceeding
  7. 7

    Towards Fault Simulation at Mixed Register-Transfer/Gate-Level Models by Kaja, Endri, Gerlin, Nicolas, Vaddeboina, Mounika, Rivas, Luis, Prebeck, Sebastian, Han, Zhao, Devarajegowda, Keerthikumara, Ecker, Wolfgang

    “…Safety-critical designs used in automotive applications need to ensure reliable operations even under hostile operating conditions. As these designs grow in…”
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    Conference Proceeding
  8. 8

    Special Session: A Mixed Simulation-, Emulation-, and Formal-Based Fault Analysis Methodology for RISC-V by Kaja, Endri, Gerlin, Nicolas, Tahiraga, Ares, Al Halabi, Jad, Prebeck, Sebastian, Stoffel, Dominik, Kunz, Wolfgang, Ecker, Wolfgang

    “…As the semiconductor industry rapidly expands, there is a need for new development methods, especially in the domain of safety-critical designs. The ISO 26262…”
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    Conference Proceeding
  9. 9

    An Automated and Effective Approach for SBST Generation Targeting RISC-V CPUs by Kaja, Endri, Gerlin, Nicolas, Halabi, Jad Al, Tahiraga, Ares, Prebeck, Sebastian, Stoffel, Dominik, Kunz, Wolfgang, Ecker, Wolfgang

    “…The trend toward scaling and more complex fabrication techniques in digital circuit design often leads to numerous faults within Integrated Circuits (ICs). To…”
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    Conference Proceeding
  10. 10

    MetaFS: Model-driven Fault Simulation Framework by Kaja, Endri, Gerlin, Nicolas, Bora, Monideep, Devarajegowda, Keerthikumara, Stoffel, Dominik, Kunz, Wolfgang, Ecker, Wolfgang

    “…The adoption of new technologies by the automotive industry drives the need for electronic component suppliers to assess and scrutinize the risk of…”
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    Conference Proceeding
  11. 11

    Design of a Tightly-Coupled RISC-V Physical Memory Protection Unit for Online Error Detection by Gerlin, Nicolas, Kaja, Endri, Bora, Monideep, Devarajegowda, Keerthikumara, Stoffel, Dominik, Kunz, Wolfgang, Ecker, Wolfgang

    “…While semiconductors are becoming more efficient generation after generation, the continuous technology scaling leads to numerous reliability issues due,…”
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    Conference Proceeding
  12. 12

    Fast and Accurate Model-Driven FPGA-based System-Level Fault Emulation by Kaja, Endri, Gerlin, Nicolas, Bora, Monideep, Rutsch, Gabriel, Devarajegowda, Keerthikumara, Stoffel, Dominik, Kunz, Wolfgang, Ecker, Wolfgang

    “…Safety-critical designs need to ensure reliable operations even under a hostile working environment with a certain degree of confidence. Continuous technology…”
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    Conference Proceeding
  13. 13

    MetFI: Model-driven Fault Simulation Framework by Kaja, Endri, Gerlin, Nicolas, Rivas, Luis, Bora, Monideep, Devarajegowda, Keerthikumara, Ecker, Wolfgang

    Published 27-04-2022
    “…Safety-critical designs need to ensure reliable operations under hostile conditions with a certain degree of confidence. The continuously higher complexity of…”
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    Journal Article
  14. 14

    Automated SoC Hardening with Model Transformation by Bavache, Varsha Bhupal, Han, Zhao, Hartlieb, Heimo, Kaja, Endri, Devarajegowda, Keerthikumara, Ecker, Wolfgang

    “…Fault tolerance enables the system to avoid threats (fail-safe) or continue with its safe operational functionality even in the presence of random faults. This…”
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    Conference Proceeding