Search Results - "Kai Pui Lam"

Adaptive Routing in Network-on-Chips Using a Dynamic-Programming Network by Mak, T., Cheung, P. Y. K., Kai-Pui Lam, Luk, W.

“…Dynamic routing is desirable because of its substantial improvement in communication bandwidth and intelligent adaptation to faulty links and congested…”
Get full text

Weighted Empirical Likelihood Estimator for Vector Multiplicative Error Model by Ding, Hao, Lam, Kai-pui

“…ABSTRACTThe vector multiplicative error model (vector MEM) is capable of analyzing and forecasting multidimensional non‐negative valued processes. Usually its…”
Get full text

A CMOS Current-Mode Dynamic Programming Circuit by Mak, Terrence, Kai-Pui Lam, Ng, H S, Rachmuth, G, Chi-Sang Poon

“…Dynamic programming (DP) is a fundamental algorithm for complex optimization and decision-making in many engineering and biomedical systems. However,…”
Get full text

Dynamic On-Chip Thermal Optimization for Three-Dimensional Networks-On-Chip by Al-Dujaily, Ra'ed, Mak, Terrence, Lam, Kai-Pui, Xia, Fei, Yakovlev, Alex, Poon, Chi-Sang

“…The complex thermal behaviour prohibits the advancement of three-dimensional (3D) very-large-scale integration system. Particularly, the high-density…”
Get full text

A Component-Based FPGA Design Framework for Neuronal Ion Channel Dynamics Simulations by Mak, Terrence S. T., Rachmuth, Guy, Lam, Kai-Pui, Poon, Chi-Sang

“…Neuron-machine interfaces such as dynamic clamp and brain-implantable neuroprosthetic devices require real-time simulations of neuronal ion channel dynamics…”
Get full text

Serial-parallel tradeoff analysis of all-pairs shortest path algorithms in reconfigurable computing by MAK, Sui-Tung, LAM, Kai-Pui

“…Implementation of shortest path algorithm in FPGA has been recently proposed for solving the network routing problem. This paper discusses the architecture and…”
Get full text

On-chip dynamic programming networks using 3D-TSV integration by Al-Dujaily, R., Mak, T., Kuan Zhou, Kai-Pui Lam, Yicong Meng, Yakovlev, A., Chi-Sang Poon

“…Recent technological advances in three-dimensional (3D) semiconductor fabrication have provided a promising platform for realizing densely interconnected…”
Get full text

Dynamic Programming Networks for Large-Scale 3D Chip Integration by Mak, T., Al-Dujaily, R., Kuan Zhou, Kai-Pui Lam, Yicong Meng, Yakovlev, A., Chi-Sang Poon

“…Recent technological advance in three-dimensional (3-D) on-chip systems integration provides a promising platform to realize multicore, multiprocessor, and…”
Get full text

Field Programmable Gate Array Implementation of Neuronal Ion Channel Dynamics by Mak, T.S., Rachmuth, G., Kai Pui Lam, Chi-Sang Poon

“…Neuron-machine interfaces such as dynamic clamp and brain-implantable neuro-prosthetic devices require real-time simulations of neuronal ion channel dynamics…”
Get full text