Search Results - "Kai Chong Chan"

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  1. 1

    Underfill selection methodology for fine pitch Cu/low-k FCBGA packages by Ong, Xuefen, Ho, Soon Wee, Ong, Yue Ying, Wai, Leong Ching, Vaidyanathan, Kripesh, Lim, Yeow Kheng, Yeo, David, Chan, Kai Chong, Tan, Juan Boon, Sohn, Dong Kyun, Hsia, Liang Choo, Chen, Zhong

    Published in Microelectronics and reliability (01-02-2009)
    “…A systematic underfill selection approach has been presented to characterize and identify suitable underfill encapsulants for large size flip chip ball grid…”
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    Journal Article
  2. 2

    Characterizations for eWLB (Embedded Wafer Level Ball Grid Array) Antenna in Molded Package Integrations in 77GHz Automotive Applications by Hsieh, Ming-Che, Zhang, Frank, Zhu, Forest, Liu, Kang, Chua, Linda, Lin, Yaojian, Damalerio, Joel, Goh, Hin Hwa, Chan, Kai Chong, Chen, Zihao

    “…The worldwide IC market has had a significant growth rate in recent years, driving diversified package solutions in the segments of communication, computing,…”
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    Conference Proceeding
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    Enabling fine pitch Cu & Ag alloy wire bond assessment for 28nm ultra low-k structure by Beleran, John D., Milanes, Ninoy, Mehta, Gaurav, Suthiwongsunthorn, Nathapong, Rajoo, Ranjan, Chan Kai Chong

    “…The use of copper wire in IC packaging has been growing steadily driven by cost effectiveness. However, there are concerns and issues that prevent or delay…”
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    Conference Proceeding
  6. 6

    Study on low-cost QFN packages for high-frequency applications by Boyu Zheng, Cubillo, J. R., Katti, G., Cheng Jin, Rajoo, R., Kai Chong Chan

    “…Quad flat no-lead (QFN) packages have found wide applications in RF and high-speed digital systems. The purpose of this paper is to study high-frequency…”
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    Conference Proceeding
  7. 7

    Copper wire bond analysis: Pad design effects and process considerations by Beleran, J. D., Yang Yong Bo, Robles, H. G., Milanes, A., Yeo, A., Chan Kai Chong

    “…In this paper, the fundamental understanding of copper (Cu) wire bonding process, and its interaction with the die bond pad surface and structure will be…”
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    Conference Proceeding
  8. 8

    Dicing Blade Characterization Using Nano-indentation by Zhu, Xintong, Rajoo, Ranjan, Nistala, Ramesh Rao, Chan, Kai Chong, Mo, Zhi Qiang

    “…In this paper, the widely used nano-indentation technique is employed to characterize the mechanical properties of dicing blade. The dicing blade is a…”
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    Conference Proceeding
  9. 9

    Structural Design and Optimization of 65nm Cu/low-k Flipchip Package by Ong, Jimmy, Tay, Andrew, Zhang, Xiaowu, Kripesh, V., Lim, Yeow Kheng, Yeo, David, Chan, Kai Chong, Tan, Juan Boon, Hsia, Liang Choo, Sohn, Dong Kyun

    “…The trend toward finer pitch and higher performance integrated circuits (ICs) devices has driven the semiconductor industry to incorporate copper and low-k…”
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    Conference Proceeding
  10. 10

    A Systematic Underfill Selection Methodology for Fine Pitch Cu/Low-k FCBGA Package by Ong, Xuefen, Sohn, Dong Kyun, Hsia, Liang Choo, Chen, Zhong, Ho, Soon Wee, Ong, Yue Ying, Wai, Leong Ching, Vaidyanathan, Kripesh, Lim, Yeow Kheng, Yeo, David, Chan, Kai Chong, Tan, Juan Boon

    “…In this paper, a systematic underfill selection approach has been presented to characterize and identify favorable underfill encapsulants for 21 Х 21mm 2 flip…”
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    Conference Proceeding
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    Design, Assembly and Reliability of Large Die (21 x 21mm2) and Fine-pitch (150pm) Cu/Low-K Flip Chip Package by Ong, Y.Y., Vaidyanathan, K., Ho, S.W., Sekhar, V.N., Jong, M.C., Wai, L.C., Rao, V.S., Sheng, V., Ong, J., Ong, X., Zhang, X., Seung, Y.U., Lau, J., Lim, Y.K., Yeo, D., Chan, K.C., Yanfeng, Z., Tan, J.B., Sohn, D.K.

    “…This paper focused on design, assembly and reliability assessments of 21 × 21 mm 2 Cu/Low-K Flip Chip (65 nm technology) with 150 ¿m bump pitch. Metal…”
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    Conference Proceeding