Search Results - "Kaczer, B."
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1
Defect profiling in FEFET Si:HfO2 layers
Published in Applied physics letters (16-11-2020)“…Ferroelectric Si-doped HfO2 is a promising candidate for future generation memory devices. However, such devices are vulnerable to significant threshold…”
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Journal Article -
2
Investigation of Imprint in FE-HfO₂ and Its Recovery
Published in IEEE transactions on electron devices (01-11-2020)“…Ferroelectric (FE)-HfO 2 -based FETs (FEFETs) are one of the most promising candidates for emerging memories. However, the FE material suffers from a unique…”
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3
Towards Complete Recovery of Circuit Degradation by Annealing With On-Chip Heaters
Published in IEEE electron device letters (01-02-2023)“…This work reports an on-chip heater structure fabricated in the Front End of Line (FEOL) on a versatile ring-oscillator (RO) array utilized to conduct…”
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4
Unveiling the Vulnerability of Oxide-Breakdown-Based PUF
Published in IEEE electron device letters (01-05-2024)“…This work reports a potential vulnerability of an oxide-breakdown-based Physical Unclonable Function (PUF). This generates a unique chip key based on the…”
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Journal Article -
5
Trapping of Hot Carriers in the Forksheet FET Wall: A TCAD Study
Published in IEEE electron device letters (01-02-2023)“…We simulate the spatial profile of trapped charge in the forksheet FET wall under hot-carrier stress by calculating carrier distribution functions and using a…”
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6
Compact Modeling of Multidomain Ferroelectric FETs: Charge Trapping, Channel Percolation, and Nucleation-Growth Domain Dynamics
Published in IEEE transactions on electron devices (01-04-2021)“…The (doped-)hafnia-based' ferroelectric FET (FeFET) is a promising candidate for low-power nonvolatile memories and shows potential use as a steep-slope…”
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7
Statistics of Multiple Trapped Charges in the Gate Oxide of Deeply Scaled MOSFET Devices-Application to NBTI
Published in IEEE electron device letters (01-05-2010)“…The statistical distribution of negative bias temperature instability (NBTI) in deca-nanometer p-channel FETs is discussed. An exponential distribution of…”
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Journal Article -
8
Novel Low Thermal Budget CMOS RMG: Performance and Reliability Benchmark Against Conventional High Thermal Budget Gate Stack Solutions
Published in IEEE transactions on electron devices (01-12-2023)“…Low thermal budget gate stack fabrication is a key enabler for upcoming CMOS technology innovations, such as sequential-3-D integration and CFETs. In this…”
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9
Characterization and Advanced Modeling of Dielectric Defects in Low-Thermal Budget RMG MOSFETs Using 1/f Noise Analysis
Published in IEEE transactions on electron devices (01-03-2024)“…This study presents a comprehensive investigation of defects in the gate-stack of low-thermal budget replacement metal gate (RMG) MOSFETs treated with novel…”
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Journal Article -
10
Impact of Charge Trapping and Depolarization on Data Retention Using Simultaneous P-V and I-V in HfO₂-Based Ferroelectric FET
Published in IEEE transactions on electron devices (01-09-2021)“…The ferroelectric (FE)-HfO 2 -based field-effect transistor (FEFET) is a promising candidate for emerging memory. However, data retention (DR) loss has been…”
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Journal Article -
11
Evidence That Two Tightly Coupled Mechanisms Are Responsible for Negative Bias Temperature Instability in Oxynitride MOSFETs
Published in IEEE transactions on electron devices (01-05-2009)“…Negative bias temperature instability (NBTI) is a serious reliability concern for pMOS transistors. Although discovered more than 40 years ago, the phenomenon…”
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12
A HydroDynamic Model for Trap-Assisted Tunneling Conduction in Ovonic Devices
Published in IEEE transactions on electron devices (01-04-2023)“…Electrical conduction in ovonic threshold switching (OTS) devices is described by introducing a new physical model where the multiphonon trap-assisted…”
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13
Variability in Planar FeFETs-Channel Percolation Impact
Published in IEEE transactions on electron devices (01-07-2023)“…We examine the origins of threshold voltage (<inline-formula> <tex-math notation="LaTeX">\textit{V}_{\text{TH}}\text{)}</tex-math> </inline-formula>…”
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14
High- k dielectrics for future generation memory devices (Invited Paper)
Published in Microelectronic engineering (01-07-2009)“…The requirements and development of high- k dielectric films for application in storage cells of future generation flash and Dynamic Random Access Memory…”
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Journal Article Conference Proceeding -
15
Superior NBTI in High- k SiGe Transistors–Part I: Experimental
Published in IEEE transactions on electron devices (01-05-2017)“…SiGe quantum-well pMOSFETs have recently been introduced for enhanced performance of transistors. Quite surprisingly, a significant reduction in negative bias…”
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16
The time dependent defect spectroscopy (TDDS) for the characterization of the bias temperature instability
Published in 2010 IEEE International Reliability Physics Symposium (01-05-2010)“…We introduce a new method to analyze the statistical properties of the defects responsible for the ubiquitous recovery behavior following negative bias…”
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Conference Proceeding -
17
Low leakage Ru-strontium titanate-Ru metal-insulator-metal capacitors for sub-20 nm technology node in dynamic random access memory
Published in Applied physics letters (24-02-2014)“…Improved metal-insulator-metal capacitor (MIMCAP) stacks with strontium titanate (STO) as dielectric sandwiched between Ru as top and bottom electrode are…”
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18
Reliability and Variability of Advanced CMOS Devices at Cryogenic Temperatures
Published in 2020 IEEE International Reliability Physics Symposium (IRPS) (01-04-2020)“…In this work, we present time-zero variability and degradation data obtained from a large set of on-chip devices in specifically designed arrays, from room…”
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Conference Proceeding -
19
Process implications on the stability and reliability of 300 mm FAB MoS2 field-effect transistors
Published in NPJ 2D materials and applications (02-02-2024)“…Recent advances in fabricating field-effect transistors with MoS 2 and other related two-dimensional (2D) semiconductors have inspired the industry to begin…”
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Journal Article -
20
Superior NBTI in High-k SiGe Transistors-Part II: Theory
Published in IEEE transactions on electron devices (01-05-2017)“…The susceptibility of conventional silicon p-channel MOS transistors to negative bias temperature instabilities (NBTIs) is a serious threat to further device…”
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