Search Results - "KODAMA, Chikaaki"

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  1. 1

    Development of a Lithography Simulation Tool Set in Various Optical Conditions for Source Mask Optimization by Kuramochi, Masaki, Kohira, Yukihide, Tanabe, Hiroyoshi, Matsunawa, Tetsuaki, Kodama, Chikaaki

    Published in IEEE access (2024)
    “…Resolution Enhancement Techniques (RETs) in optical lithography have become essential for achieving the continuous shrinkage of technology nodes. The primary…”
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    Journal Article
  2. 2

    Effective two-dimensional pattern generation for self-aligned double patterning by Ihara, Takeshi, Takahashi, Atsushi, Kodama, Chikaaki

    “…In nano-scale systems, design for manufacturability is essentially required. For sub 20 nm technology node, Self-Aligned Double Patterning (SADP) is an…”
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    Conference Proceeding
  3. 3

    A fast algorithm for rectilinear block packing based on selected sequence-pair by Fujiyoshi, Kunihiro, Kodama, Chikaaki, Ikeda, Akira

    Published in Integration (Amsterdam) (01-04-2007)
    “…In this paper, we present a method of rectilinear block packing using selected sequence-pair (SSP), a rectangle packing representation. We also propose a fast…”
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    Journal Article
  4. 4

    Lithography hotspot detection by two-stage cascade classifier using histogram of oriented light propagation by Tomioka, Yoichi, Matsunawa, Tetsuaki, Kodama, Chikaaki, Nojima, Shigeki

    “…In advanced semiconductor-process technology, the ability to detect and repair lithography hotspots, which can affect printability, is essential. In this…”
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    Conference Proceeding
  5. 5

    A fast process variation and pattern fidelity aware mask optimization algorithm by Awad, Ahmed, Takahashi, Atsushi, Tanaka, Satoshi, Kodama, Chikaaki

    “…With the continuous shrinking of minimum feature sizes beyond current 193nm wavelength for optical micro lithography, the electronic industry relies on…”
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    Conference Proceeding
  6. 6

    Subresolution Assist Feature Generation With Supervised Data Learning by Xu, Xiaoqing, Lin, Yibo, Li, Meng, Matsunawa, Tetsuaki, Nojima, Shigeki, Kodama, Chikaaki, Kotani, Toshiya, Pan, David Z.

    “…Subresolution assist feature (SRAF) generation is a very important resolution enhancement technique to improve yield in modern semiconductor manufacturing…”
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    Journal Article
  7. 7

    A Fast Process-Variation-Aware Mask Optimization Algorithm With a Novel Intensity Modeling by Awad, Ahmed, Takahashi, Atsushi, Tanaka, Satoshi, Kodama, Chikaaki

    “…With the continuous shrinkage of advanced technology nodes into the sub-16-nm regime, optical proximity correction (OPC) is still the main stream to preserve…”
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    Journal Article
  8. 8

    A fast manufacturability aware Optical Proximity Correction (OPC) algorithm with adaptive wafer image estimation by Awad, Ahmed, Takahashi, Atsushi, Kodama, Chikaaki

    “…Aggressive Optical Proximity Correction (OPC) has been widely adopted in optical lithography to preserve circuit performance for sub-20nm technology nodes…”
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    Conference Proceeding Journal Article
  9. 9

    Self-Aligned Double and Quadruple Patterning Aware Grid Routing Methods by Kodama, Chikaaki, Ichikawa, Hirotaka, Nakayama, Koichi, Nakajima, Fumiharu, Nojima, Shigeki, Kotani, Toshiya, Ihara, Takeshi, Takahashi, Atsushi

    “…Although self-aligned double and quadruple patterning (SADP, SAQP) have promising processes for sub-20 nm node advanced technologies and beyond, not all…”
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    Journal Article
  10. 10

    Grid-based Self-Aligned Quadruple Patterning aware two dimensional routing pattern by Ihara, Takeshi, Hongo, Toshiyuki, Takahashi, Atsushi, Kodama, Chikaaki

    “…A routing grid for Self-Aligned Quadruple Patterning (SAQP) helps to find a valid routing of SAQP, but it is not easy to find it. The routing of SAQP on the…”
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    Conference Proceeding Journal Article
  11. 11

    Linear Programming-Based Cell Placement With Symmetry Constraints for Analog IC Layout by Koda, S., Kodama, C., Fujiyoshi, K.

    “…In recent high-performance analog integrated circuit design, it is often required to place some cells symmetrically to a horizontal or vertical axis. Balasa et…”
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    Journal Article
  12. 12

    Self-Aligned Double and Quadruple Patterning-aware grid routing with hotspots control by Kodama, C., Ichikawa, H., Nakayama, K., Kotani, T., Nojima, S., Mimotogi, S., Miyamoto, S., Takahashi, A.

    “…Although Self-Aligned Double and Quadruple Patterning (SADP, SAQP) have become the most promising processes for sub-20 nm and sub-14 nm node advanced…”
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    Conference Proceeding
  13. 13

    Manufacturability-aware mask assignment in multiple patterning lithography by Kohira, Yukihide, Takahashi, Atsushi, Matsui, Tomomi, Kodama, Chikaaki, Nojima, Shigeki, Tanaka, Satoshi

    “…Due to the progress of the process technology, multiple patterning lithography (MPL) is one of the most promising techniques in the 22 nm logic node and…”
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    Conference Proceeding
  14. 14

    Fast mask assignment using positive semidefinite relaxation in LELECUT triple patterning lithography by Kohira, Yukihide, Matsui, Tomomi, Yokoyama, Yoko, Kodama, Chikaaki, Takahashi, Atsushi, Nojima, Shigeki, Tanaka, Satoshi

    “…One of the most promising techniques in the 14 nm logic node and beyond is triple patterning lithography (TPL). Recently, LELECUT type TPL technology, where…”
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    Conference Proceeding
  15. 15

    Selected sequence-pair: an efficient decodable packing representation in linear time using sequence-pair by Kodama, Chikaaki, Fujiyoshi, Kunihiro

    “…In this paper, we propose "selected sequence-pair" (SSP), a sequence-pair (seq-pair) with the limited number of subsequences called adjacent crosses. Its…”
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    Conference Proceeding
  16. 16

    Thermal Driven Module Placement Using Sequence-pair by Okada, N., Kodama, C., Sato, T., Fujiyoshi, K.

    “…TThe increase of power consumption in recent VLSI chip has led to uneven thermal distribution and high temperature on the chip. This brings inappropriate…”
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    Conference Proceeding
  17. 17
  18. 18

    A fast algorithm for rectilinear block packing based on selected sequence-pair by Ikeda, A., Kodama, C., Fujiyoshi, K.

    “…We propose a fast algorithm to obtain a rectilinear block packing in O((p+1)n) time keeping all the constrains imposed by a given SSP, a conventional method to…”
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    Conference Proceeding