Search Results - "KIFLI, A"

Embedded software in real-time signal processing systems: design technologies by Goossens, G., Van Praet, J., Lanneer, D., Geurts, W., Kifli, A., Liem, C., Paulin, P.G.

“…The increasing use of embedded software, often implemented on a core processor in a single-chip system, is a clear trend in the telecommunications, multimedia,…”
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A unified scheduling model for high-level synthesis and code generation by Kifli, A., Goosens, G., De Man, H.

“…Scheduling is an essential task both in high-level synthesis and in code generation for programmable processors. In this paper we discuss the impact of the…”
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A unified scheduling model for high-level synthesis and code generation by Kifli, A., Goossens, G., De Man, H.

“…Scheduling is an essential task both in high-level synthesis and in code generation for programmable processors. In this paper we discuss the impact of the…”
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Power scan: DFT for power switches in VLSI designs by Bing-Chuan Bai, Chien-Mo Li, Kifli, A., Even Tsai, Kun-Cheng Wu

“…This poster presents Power Scan, a design-for-testability for power switches in VLSI designs. It measures IR drop in function mode and detects leakage current…”
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A Practical DFT Approach for Complex Low Power Designs by Kifli, A., Chen, Y.W., Tsay, Y.W., Wu, K.C.

“…Low power designs create new challenges in design implementation, verification and testing. DFT practice that overlooks test power may result in yield…”
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Test cycle power optimization for scan-based designs by Kun-Han Tsai, Yu Huang, Wu-Tung Cheng, Ting-Pu Tai, Kifli, A

“…Extraordinary power consumption during the scan test may inadvertently cause a functional good die to fail. This paper proposes a peak power reduction…”
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High Quality Pattern Generation for Delay Defects with Functional Sensitized Paths by Ming-Ting Hsieh, Shun-Yen Lu, Jing-Jia Liou, KiFli, A.

“…Test patterns of path delay faults (PDFs) are usually generated with static or robust sensitizing criteria for side inputs of gates, because defects affecting…”
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Embedded software in real-time signal processing systems : Design technologies: Hardware/software co-design by GOOSSENS, G, VAN PRAET, J, LANNEER, D, GEURTS, W, KIFLI, A, LIEM, C, PAULIN, P. G

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Fault modeling and testing of retention flip-flops in low power designs by Bing-Chuan Bai, Kifli, A., Chien-Mo Li, Kun-Cheng Wu

“…Low power circuits have become a necessary part in modern designs. Retention flip-flop is one of the most important components in low power designs…”
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Test Power IR Drop Closure Flow for NetComposer-I Platform Design by Kifli, A., Chen, W.J., Chen, Y.W., Wu, K.C.

“…Power noise has become one of the main culprits in failing chips in SoC designs. As power consumption during scan test can be several times higher than during…”
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Smoking Initiation and Continuation - A Qualitative Study among Bruneian Male Adolescents by Talip, Tajidah, Kifli, Nurolaini, Murang, Zaidah, Naing, Lin

“…Background: Cigarette smoking is one of the leading global causes of premature and preventable death. In Brunei Darussalam, smoking-related diseases have been…”
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Systematic Review of Smoking Initiation among Asian Adolescents, 2005-2015: Utilizing the Frameworks of Triadic Influence and Planned Behavior by Talip, Tajidah, Murang, Zaidah, Kifli, Nurolaini, Naing, Lin

“…Background: A recent WHO data report on mortality attributable to tobacco use including cigarette smoking indicated a very high burden of deaths in Asia and…”
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