Search Results - "Kırkaya, Emre"

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  1. 1

    Sayısal Haberleşme Sistemlerinde Esnek Karar Verme Demodülasyon Yöntemlerinin Fpga Üzerinde Etkin Bir Şekilde Gerçekleştirilmesi by Kırkaya, Emre

    Published 01-01-2016
    “…Sayısal haberleşme sistemlerinde esnek karar verme demodülasyon, yumuşak giriş yumuşak çıkış kod çözücü için esnek bit değerleri üreten bir demodülasyon…”
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    Dissertation
  2. 2

    FPGA Implementation of Synchronization Techniques used in OFDM Systems by Karakoc, Murat Can, Sertkaya, Muhammet Fatih, Kirkaya, Emre, Cavus, Enver

    “…In this work, symbol timing offset (STO) and carrier frequency offset (CFO) detection algorithms used in OFDM systems developed by Minn et al. modeled and…”
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    Conference Proceeding
  3. 3

    Baseband implementation of high speed communication system on FPGA by Ozturk, Mustafa, Kirkaya, Emre, Balcisoy, Ersen, Sanli, Mahir, Cicek, Adem, Cavus, Enver

    “…For high speed data transfer with 240 GHz OFDM based communication system, the baseband calculations should be done at very high processing rate to be able to…”
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    Conference Proceeding
  4. 4

    FPGA implementation of symbol timing synchronization for OFDM systems by Karakoc, Murat Can, Kirkaya, Emre, Ersoy, Ozgun, Sanli, Mahir, Cicek, Adem, Cavu, Enver, Ozyurt, Serdar, Gulden, Mehmet Ali

    “…In this work, after some of the commonly used symbol timing synchronization algorithms used in orthogonal frequency division multiplexing systems are examined,…”
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    Conference Proceeding
  5. 5

    FPGA implementation of MMSE channel estimation algorithm using system generator by Sanli, Mahir, Ozturk, Mustafa, Balcisoy, Ersen, Karakoc, Murat Can, Kirkaya, Emre, Cicek, Adem, Ozyurt, Serdar, Cavus, Enver

    “…In this paper, MMSE channel estimation algorithm is implemented on FPGA for systems using Orthogonal Frequency Division Multiplexing (OFDM). The application…”
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    Conference Proceeding
  6. 6

    FPGA implementation of layered low density parity check error correction codes by Caglan, Abdulsamet, Balcisoy, Ersen, Kirkaya, Emre, Charyyev, Gurbannazar, Cicek, Adem, Cavus, Enver

    “…In this study, Layered Low Density Parity Check (LDPC) Decoder algorithm in Error Correction Codes is implemented on FPGA. Firstly, Layered LDPC Decoder…”
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    Conference Proceeding