Search Results - "Jose, Matthew San"

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    Experimental Demonstration of Gate-Level Logic Camouflaging and Run-Time Reconfigurability Using Ferroelectric FET for Hardware Security by Dutta, Sourav, Grisafe, Benjamin, Frentzel, Chloe, Enciso, Zephan, Jose, Matthew San, Smith, Jeffrey, Ni, Kai, Joshi, Siddharth, Datta, Suman

    Published in IEEE transactions on electron devices (01-02-2021)
    “…Outsourcing of integrated circuit (IC) manufacturing and increasing sophistication of IC reverse engineering techniques have unleashed security threats such as…”
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    Journal Article
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    Pseudo-Static 1T Capacitorless DRAM using 22nm FDSOI for Cryogenic Cache Memory by Chakraborty, Wriddhi, Saligram, Rakshith, Gupta, Aniket, Jose, Matthew San, Aabrar, Khandker Akif, Dutta, Sourav, Khanna, Abhishek, Raychowdhury, Arijit, Datta, Suman

    “…Cryogenic CMOS processors need low latency, high bandwidth access to high-density on-die cache memory to maximize performance. In this work, we experimentally…”
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    Conference Proceeding
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