Search Results - "Joo, Yongsuk"

  • Showing 1 - 5 results of 5
Refine Results
  1. 1
    A 1.1 V 2y-nm 4.35 Gb/s/pin 8 Gb LPDDR4 Mobile Device With Bandwidth Improvement Techniques

    A 1.1 V 2y-nm 4.35 Gb/s/pin 8 Gb LPDDR4 Mobile Device With Bandwidth Improvement Techniques by Song, Keunsoo, Lee, Sangkwon, Kim, Dongkyun, Shim, Youngbo, Park, Sangil, Ko, Bokrim, Hong, Duckhwa, Joo, Yongsuk, Lee, Wooyoung, Cho, Yongdeok, Shin, Wooyeol, Yun, Jaewoong, Lee, Hyengouk, Lee, Jeonghun, Lee, Eunryeong, Jang, Namkyu, Yang, Jaemo, Jung, Hae-kang, Cho, Joohwan, Kim, Hyeongon, Kim, Jinkook

    Published in IEEE journal of solid-state circuits (01-08-2015)
    “…The demands on higher bandwidth with reduced power consumption in mobile market are driving mobile DRAM with advanced design techniques. Proposed LPDDR4 in…”
    Get full text
    Journal Article
    Save to List
    Saved in:
  2. 2
    A 1.1V 2y-nm 4.35Gb/s/pin 8Gb LPDDR4 mobile device with bandwidth improvement techniques

    A 1.1V 2y-nm 4.35Gb/s/pin 8Gb LPDDR4 mobile device with bandwidth improvement techniques by Keunsoo Song, Sangkwon Lee, Dongkyun Kim, Youngbo Shim, Sangil Park, Bokrim Ko, Duckhwa Hong, Yongsuk Joo, Wooyoung Lee, Yongdeok Cho, Wooyeol Shin, Jaewoong Yun, Hyengouk Lee, Jeonghun Lee, Eunryeong Lee, Jaemo Yang, Haekang Jung, Namkyu Jang, Joohwan Cho, Hyeongon Kim, Jinkook Kim

    “…The demands on higher bandwidth with reduced power consumption in mobile market are driving mobile DRAM to have advanced design techniques. Proposed LPDDR4 in…”
    Get full text
    Conference Proceeding
    Save to List
    Saved in:
  3. 3
    13.1 A 35.4Gb/s/pin 16Gb GDDR7 with a Low-Power Clocking Architecture and PAM3 IO Circuitry

    13.1 A 35.4Gb/s/pin 16Gb GDDR7 with a Low-Power Clocking Architecture and PAM3 IO Circuitry by Yang, Jaehyeok, Ko, Hyeongjun, Kim, Kyunghoon, Park, Hyunsu, Park, Jihwan, Kang, Ji-Hyo, Cha, Jinyoup, Kim, Seongjin, Kim, Youngtaek, Park, Minsoo, Lee, Gangsik, Lee, Keonho, Lee, Sanghoon, Jeon, Gyunam, Jeong, Sera, Joo, Yongsuk, Cha, Jaehoon, Hwang, Seonwoo, Kim, Boram, Byeon, Sangyeon, Lee, Sungkwon, Park, Hyeonyeol, Cho, Joohwan, Kim, Jonghwan

    “…The increase in GPU-based AI applications, cloud-based gaming, and video streaming services has driven the need for new a graphics memory that operates at…”
    Get full text
    Conference Proceeding
    Save to List
    Saved in:
  4. 4
    25.1 A 24Gb/s/pin 8Gb GDDR6 with a Half-Rate Daisy-Chain-Based Clocking Architecture and IO Circuitry for Low-Noise Operation

    25.1 A 24Gb/s/pin 8Gb GDDR6 with a Half-Rate Daisy-Chain-Based Clocking Architecture and IO Circuitry for Low-Noise Operation by Kim, Kyunghoon, Chae, Joo-Hyung, Yang, Jaehyeok, Kang, Jihyo, Lee, Gangsik, Byeon, Sangyeon, Kim, Youngtaek, Kim, Boram, Kim, Dong-Hyun, Cho, Yeongmuk, Choi, Kangmoo, Park, Hyeongyeol, Ji, Junghwan, Jeong, Sera, Joo, Yongsuk, Cha, Jaehoon, Park, Minsoo, Kim, Hongdeuk, Park, Sijun, Kong, Kyubong, Kim, Sunho, Lee, Sangkwon, Chun, Junhyun, Kim, Hyungsoo, Cha, Seonyong

    “…The demand for high-performance graphics systems used for artificial intelligence continues to grow; this trend requires graphics systems to achieve ever…”
    Get full text
    Conference Proceeding
    Save to List
    Saved in:
  5. 5
    23.3 A 4.8Gb/s/pin 2Gb LPDDR4 SDRAM with sub-100µA self-refresh current for IoT applications

    23.3 A 4.8Gb/s/pin 2Gb LPDDR4 SDRAM with sub-100µA self-refresh current for IoT applications by Nohhyup Kwak, Saeng-Hwan Kim, Kyong Ha Lee, Chang-Ki Baek, Mun Seon Jang, Yongsuk Joo, Seung-Hun Lee, Woo Young Lee, Eunryeong Lee, Donghee Han, Jaeyeol Kang, Jung Ho Lim, Jae-Beom Park, Kyung-Tae Kim, Sunki Cho, Sung Woo Han, Jee Yeon Keh, Jun Hyun Chun, Jonghoon Oh, Seok Hee Lee

    “…The internet of things (IoT) requires that more data are collected and processed by devices with faster response, but lower power consumption. In order to…”
    Get full text
    Conference Proceeding
    Save to List
    Saved in:

Search Tools: