Search Results - "Jing-Hong Conan Zhan"

Refine Results
  1. 1

    A Fully-Integrated 16-Element Phased-Array Receiver in SiGe BiCMOS for 60-GHz Communications by Natarajan, A, Reynolds, S K, Ming-Da Tsai, Nicolson, S T, Zhan, J.-H C, Dong Gun Kam, Duixian Liu, Huang, Y.-L O, Valdes-Garcia, A, Floyd, B A

    Published in IEEE journal of solid-state circuits (01-05-2011)
    “…A fully-integrated 16-element 60-GHz phased-array receiver is implemented in IBM 0.12-μm SiGe BiCMOS technology. The receiver employs RF-path phase-shifting…”
    Get full text
    Journal Article Conference Proceeding
  2. 2

    A 25-GHz emitter degenerated LC VCO by Jing-Hong Conan Zhan, Duster, J.S., Kornegay, K.T.

    Published in IEEE journal of solid-state circuits (01-11-2004)
    “…A 25-GHz emitter degenerated bipolar LC voltage-controlled oscillator (VCO) designed in IBM's SiGe 6 HP BiCMOS process (f/sub T//spl sim/47 GHz) is presented…”
    Get full text
    Journal Article
  3. 3
  4. 4

    A Digital Intensive Fractional-N PLL and All-Digital Self-Calibration Schemes by Ping-Ying Wang, Zhan, J.-H.C., Hsiang-Hui Chang, Chang, H.-M.S.

    Published in IEEE journal of solid-state circuits (01-08-2009)
    “…A digital intensive PLL featuring a digital filter in parallel with an analog feed-forward path and a digital controlled oscillator (DCO) is presented. Digital…”
    Get full text
    Journal Article
  5. 5

    A Fully Integrated 16-Element Phased-Array Transmitter in SiGe BiCMOS for 60-GHz Communications by Valdes-Garcia, Alberto, Floyd, Brian, Nicolson, Sean T., Lai, Jie-Wei, Natarajan, Arun, Chen, Ping-Yu, Reynolds, Scott K., Zhan, Jing-Hong Conan, Kam, Dong G., Liu, Duixian

    Published in IEEE journal of solid-state circuits (01-12-2010)
    “…A phased-array transmitter (TX) for multi-Gb/s non-line-of-sight links in the four frequency channels of the IEEE 802.15.3c standard (58.32 to 64.8 GHz) is…”
    Get full text
    Journal Article Conference Proceeding
  6. 6

    A 16-element phased-array receiver IC for 60-GHz communications in SiGe BiCMOS by Reynolds, Scott K, Natarajan, Arun S, Ming-Da Tsai, Nicolson, Sean, Jing-Hong Conan Zhan, Duixian Liu, Kam, Dong G, Huang, Oscar, Valdes-Garcia, Alberto, Floyd, Brian A

    “…A 0.12-μm SiGe phased-array Rx IC for beam-steered wireless communication in the 60-GHz band is described. It has 16 RF phase-shifting front-ends with 11°…”
    Get full text
    Conference Proceeding
  7. 7
  8. 8
  9. 9

    A Broadband Low-Cost Direct-Conversion Receiver Front-End in 90 nm CMOS by Zhan, J.-H.C., Carlton, B.R., Taylor, S.S.

    Published in IEEE journal of solid-state circuits (01-05-2008)
    “…Transistors in aggressively scaled CMOS technologies have f T greater than 150 GHz, which exceeds requirements for most existing commercial applications below…”
    Get full text
    Journal Article Conference Proceeding
  10. 10
  11. 11

    A Fractional Spur-Free ADPLL with Loop-Gain Calibration and Phase-Noise Cancellation for GSM/GPRS/EDGE by Chang, Hsiang-Hui, Wang, Ping-Ying, Zhan, Jing-Hong Conan, Hsieh, Bing-Yu

    “…This paper presents a 3.2-to-4GHz fractional spur-free ADPLL. The ADPLL is fabricated in a 0.13 mum CMOS process and packaged in QFN76. Fractional spurs are…”
    Get full text
    Conference Proceeding
  12. 12

    Analysis and design of negative impedance LC oscillators using bipolar transistors by Zhan, J.-H.C., Maurice, K., Duster, J., Kornegay, K.T.

    “…This paper provides an analysis on how the application of emitter degeneration increases the oscillation frequency while improving the output phase noise and…”
    Get full text
    Journal Article
  13. 13

    An Inductor-Less Broadband LNA with Gain Step by Zhan, J.H.C., Taylor, S.S.

    “…This paper presents a compact, inductor-less broadband LNA fabricated in a 90nm CMOS process. The LNA has 5.5GHz 3dB bandwidth, ~25dB voltage gain, a noise…”
    Get full text
    Conference Proceeding
  14. 14

    An analog enhanced all digtial RF fractional-N PLL with self-calibrated capability by Ping-Ying Wang, Zhan, J.-H.C., Hsiang-Hui Chang, Bing-Yu Hsieh

    “…In this paper, an analog enhanced all digital fractional-N PLL is proposed. An analog feed-forward circuits replace the time-to-digital converter used in…”
    Get full text
    Conference Proceeding
  15. 15

    Low-Cost Direct Conversion RF Front-Ends in Deep Submicron CMOS by Jing-Hong Zhan, Carlton, B.R., Taylor, S.S.

    “…This paper reviews architectures and circuit techniques suitable for highly integrated broadband receiver front-ends. Direct conversion simplifies the receiver…”
    Get full text
    Conference Proceeding
  16. 16

    A fractional spur reduction technique for RF TDC-based all digital PLLs by Ping-Ying Wang, Hsiang-Hui Chang, Zhan, J.-H.C.

    “…In this paper, a technique is proposed to suppress the fractional spur induced by non-linearity of the loop in all digital PLLs (ADPLLs). The measurement…”
    Get full text
    Conference Proceeding
  17. 17
  18. 18

    A SiGe BiCMOS 16-element phased-array transmitter for 60GHz communications by Valdes-Garcia, A., Nicolson, S., Jie-Wei Lai, Natarajan, A., Ping-Yu Chen, Reynolds, S., Zhan, J.-H.C., Floyd, B.

    “…A 60 GHz phased-array transmitter for multi-Gb/s non-line-of-sight links is fully integrated in a 0.12 ¿m SiGe BiCMOS process. It consists of an up-conversion…”
    Get full text
    Conference Proceeding
  19. 19
  20. 20

    Session 3 overview / RF: RF techniques by Craninckx, Jan, Zhan, Jing-Hong Conan

    “…Summary form only given. Wireless circuits have become the foundation of the way we live our lives, and this trend will only continue further in the future…”
    Get full text
    Conference Proceeding