Search Results - "Jeongsup Lee"
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1
A Self-Tuning IoT Processor Using Leakage-Ratio Measurement for Energy-Optimal Operation
Published in IEEE journal of solid-state circuits (01-01-2020)“…Energy-optimal operation is one of the key requirements of the Internet-of-Things (IoT) applications to increase battery life. In this article, using a…”
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2
Al-doped ZnO as a switching layer for transparent bipolar resistive switching memory
Published in Electronic materials letters (01-03-2014)“…In this report, we employ an Al-doped ZnO (AZO) layer as a resistive switching layer for transparent resistive switching random access memory devices. An…”
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3
An Adaptive Body-Biaslna SoC Using in Situ Slack Monitoring for Runtime Replica Calibration
Published in 2018 IEEE Symposium on VLSI Circuits (01-06-2018)“…This work proposes a hybrid approach combining the benefits of in situ timing slack monitoring and tunable replica techniques while avoiding their drawbacks…”
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Conference Proceeding -
4
An ultra-wide program, 122pJ/bit flash memory using charge recycling
Published in 2017 Symposium on VLSI Circuits (01-06-2017)“…Embedded flash for low power sensing systems require very low write energy and peak power. This work proposes a 130nm, 1024×260 SONOS flash with an ultra-wide…”
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Conference Proceeding -
5
Design Techniques of Integrated Power Management Circuits for Low Power Edge Devices
Published in 2021 IEEE Custom Integrated Circuits Conference (CICC) (01-04-2021)“…Edge devices are essential elements for Internet of Things (1oT). To extend the battery life or achieve batteryless operation through energy harvesting, low…”
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Conference Proceeding -
6
A 0.3-V to 1.8-3.3-V Leakage-Biased Synchronous Level Converter for ULP SoCs
Published in IEEE solid-state circuits letters (2020)“…This letter proposes a robust synchronous wide-range clocked level converter (LC) that converts subthreshold input signals to high I/O voltages for ultra-low…”
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7
A Fully Integrated, Automatically Generated DC-DC Converter Maintaining >75% Efficiency From 398 K Down to 23 K Across Wide Load Ranges in 12 nm FinFET
Published in IEEE solid-state circuits letters (01-01-2024)“…This paper presents a fully integrated recursive successive-approximation switched capacitor (RSC) DC-DC converter implemented using an automatic cell-based…”
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INVITED: Toward an Open-Source Digital Flow: First Learnings from the OpenROAD Project
Published in 2019 56th ACM/IEEE Design Automation Conference (DAC) (01-06-2019)“…We describe the planned Alpha release of OpenROAD, an open-source end-to-end silicon compiler. OpenROAD will help realize the goal of "democratization of…”
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Conference Proceeding -
9
75% Efficiency From 398 K Down to 23 K Across Wide Load Ranges in 12-nm FinFET
Published in IEEE solid-state circuits letters (01-01-2024)“…75% efficiency across a vast range of output currents and temperatures. Our design targets voltage scaling for applications, such as cryo-computing,…”
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10
A Noise-Efficient Neural Recording Amplifier Using Discrete-Time Parametric Amplification
Published in IEEE solid-state circuits letters (01-11-2018)“…This letter proposes an instrumentation amplifier for neural recording applications whose measured noise efficiency factor (NEF) is 2.2. A discrete-time…”
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19.2 A 6.4pJ/Cycle Self-Tuning Cortex-M0 IoT Processor Based on Leakage-Ratio Measurement for Energy-Optimal Operation Across Wide-Range PVT Variation
Published in 2019 IEEE International Solid- State Circuits Conference - (ISSCC) (01-02-2019)“…Wireless sensors for IoT applications have become a prominent computing class and are typically severely power constrained. IoT devices are deployed in a wide…”
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Conference Proceeding -
12
A 100-GbE reverse gearbox IC in 40nm CMOS for supporting legacy 10- and 40-GbE standards
Published in 2015 Symposium on VLSI Circuits (VLSI Circuits) (01-06-2015)“…This paper presents the industry's first low-power 100-Gigabit Ethernet (GbE) multi-link gearbox (MLG) IC, which facilitates transport of independent 10-GbE…”
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Conference Proceeding Journal Article -
13
A \muProcessor Layer for mm-Scale Die-Stacked Sensing Platforms Featuring Ultra-Low Power Sleep Mode at 125°C
Published in 2020 IEEE Asian Solid-State Circuits Conference (A-SSCC) (09-11-2020)“…This paper presents an ultra-low power sleep mode \mu processor layer designed for use in mm-scale die-stacked wireless sensing platforms for high temperature…”
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Conference Proceeding