Search Results - "Jedhe, Gajanan"

A 12nm 137 TOPS/W Digital Compute-In-Memory using Foundry 8T SRAM Bitcell supporting 16 Kernel Weight Sets for AI Edge Applications by Jedhe, Gajanan, Deshpande, Chetan, Kumar, Sushil, Xue, Cheng-Xin, Guo, Zijie, Garg, Ritesh, Jway, Kim Soon, Chang, En-Jui, Liang, Jenwei, Wan, Zhe, Pan, Zhenhao

“…This paper presents a Digital Compute-In-Memory design in 12nm FinFET technology with capacity to store weights for 16 kernels per input channel. This macro is…”
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20.1 NVE: A 3nm 23.2TOPS/W 12b-Digital-CIM-Based Neural Engine for High-Resolution Visual-Quality Enhancement on Smart Devices by Shih, Ming-En, Hsieh, Shih-Wei, Tsai, Ping-Yuan, Lin, Ming-Hung, Tsung, Pei-Kuei, Chang, En-Jui, Liang, Jenwei, Chang, Shu-Hsin, Huang, Chung-Lun, Nian, You-Yu, Wan, Zhe, Kumar, Sushil, Xue, Cheng-Xin, Jedhe, Gajanan, Fujiwara, Hidehiro, Mori, Haruki, Chen, Chih-Wei, Huang, Po-Hua, Juan, Chih-Feng, Chen, Chung-Yi, Lin, Tsung-Yao, Wang, Ch, Chen, Chih-Cheng, Jou, Kevin

“…Enhancing video quality is critical for achieving a boosted user experience on smart devices including mobiles, televisions, and monitors. Practical hardware…”
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A 12-nm 0.62-1.61 mW Ultra-Low Power Digital CIM-based Deep-Learning System for End-to-End Always-on Vision by Chang, En-Jui, Xue, Cheng-Xin, Deshpande, Chetan, Jedhe, Gajanan, Liang, Jenwei, Cheng, Chih-Chung, Lin, Hung-Wei, Lee, Chia-Da, Kumar, Sushil, Jway, Kim Soon, Guo, Zijie, Garg, Ritesh, Lu, Allen-Cl, Lin, Chien-Hung, Hsieh, Meng-Han, Lin, Tsung-Yao, Chen, Chih-Cheng

“…This work proposes an ultra-low power DCIM-based DL system (DCIM-DLS) for end-to-end AoV with the power range from 0.62 to 1.61 mW (INT8, 2-15 fps). Compared…”
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A Scalable High Throughput Firewall in FPGA by Jedhe, G.S., Ramamoorthy, A., Varghese, K.

“…High end network security applications demand high speed operation and large rule set support. Packet classification is the core functionality that demands…”
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A 5nm Fin-FET 2G-search/s 512-entry x 220-bit TCAM with Single Cycle Entry Update Capability for Data Center ASICs by Deshpande, Chetan, Garg, Ritesh, Jedhe, Gajanan, Narvekar, Gaurang, Kumar, Sushil

“…This paper presents a 2G-search/s embedded Ternary Content Addressable Memory (TCAM) design in 5nm Fin-FET technology with the ability to update both SRAM…”
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