Search Results - "Javerliac, V."

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  1. 1

    High Speed, High Stability and Low Power Sensing Amplifier for MTJ/CMOS Hybrid Logic Circuits by Weisheng Zhao, Chappert, C., Javerliac, V., Noziere, J.-P.

    Published in IEEE transactions on magnetics (01-10-2009)
    “…Densely embedding Magnetic Tunnel Junctions (MTJ) in CMOS logic circuits is considered as one potentially powerful solution to bring non volatility, instant…”
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    Journal Article Conference Proceeding
  2. 2

    Beyond MRAM, CMOS/MTJ Integration for Logic Components by Prenat, G., Dieny, B., Wei Guo, El Baraji, M., Javerliac, V., Nozieres, J.-P.

    Published in IEEE transactions on magnetics (01-10-2009)
    “…Spintronics is a new discipline in which the spin of the electron is used as an additional degree of freedom besides its electrical charge to build innovative…”
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    Journal Article Conference Proceeding
  3. 3

    Evaluation of a Non-Volatile FPGA based on MRAM technology by Zhao, W., Belhaire, E., Javerliac, V., Chappert, C., Dieny, B.

    “…In this paper, we propose a new structure of FPGA based on MRAM technology; we name it MFPGA (magnetic FPGA). FPGA based on SRAM technology has been developed…”
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    Conference Proceeding
  4. 4

    Macro-model of Spin-Transfer Torque based Magnetic Tunnel Junction device for hybrid Magnetic-CMOS design by Zhao, W., Belhaire, E., Mistral, Q., Chappert, C., Javerliac, V., Dieny, B., Nicolle, E.

    “…The development of hybrid magnetic-CMOS circuits such as MRAM (magnetic RAM) and magnetic logic circuit requires efficient simulation models for the magnetic…”
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    Conference Proceeding
  5. 5
  6. 6

    A non-volatile flip-flop in magnetic FPGA chip by Zhao, W., Belhaire, E., Javerliac, V., Chappert, C., Dieny, B.

    “…In this paper, the authors propose a non-volatile flip-flop, which presents simultaneously low power dissipation and high speed. This flip-flop is based on…”
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    Conference Proceeding
  7. 7

    Towards an ultra-low power, high density and non-volatile Ternary CAM by El Baraji, M., Javerliac, V., Prenat, G.

    “…Due to rapidly expanding networking industry demands, there is a corresponding need for high speed search capability, reduced power consumption and data…”
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    Conference Proceeding
  8. 8

    CMOS/Magnetic Hybrid Architectures by Prenat, G., El Baraji, M., Wei Guo, Sousa, R., Buda-Prejbeanu, L., Dieny, B., Javerliac, V., NoziERES, J.-P., Weisheng Zhao, Belhaire, E.

    “…The general purpose of spin-electronics is to take advantage of the spin of the electrons in addition to their electrical charge to conceive innovative…”
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    Conference Proceeding
  9. 9

    Non-volatile register based on hybrid spintronics/CMOS technology by Weisheng Zhao, Belhaire, E., Chappert, C., Javerliac, V., Mazoyer, P.

    “…In this paper, we present a non-volatile register based on hybrid Spintronics/CMOS technology, which can store securely and non-vocatively all the intermediate…”
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    Conference Proceeding