Search Results - "Jasnetski, Artjom"
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Software-based self-test generation for microprocessors with high-level decision diagrams
Published in Proceedings of the Estonian Academy of Sciences (01-01-2014)“…This article presents a novel approach to automated behavioural level test program generation for microprocessors, using the model of high-level decision…”
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Journal Article -
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Software-based self-test generation for microprocessors with high-level decision diagrams/Korgtasemega otsustusdiagrammidel pohinev testprogrammide suntees mikroprotsessoritele
Published in Proceedings of the Estonian Academy of Sciences (01-03-2014)“…This paper presents a novel approach to automated behavioural level test program generation for microprocessors using the model of high-level decision diagrams…”
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Journal Article -
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Automated software-based self-test generation for microprocessors
Published in 2017 MIXDES - 24th International Conference "Mixed Design of Integrated Circuits and Systems (01-06-2017)“…Software-based self-testing (SBST) is a well-known non-intrusive method for testing microprocessors. This paper presents a tool for automated Software-Based…”
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Conference Proceeding -
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On automatic software-based self-test program generation based on high-level decision diagrams
Published in 2016 17th Latin-American Test Symposium (LATS) (01-04-2016)“…Software-Based Self-Testing (SBST) is a well-known non-intrusive method for testing microprocessors. This paper presents an approach for automatic SBST program…”
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Conference Proceeding -
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High-level test data generation for software-based self-test in microprocessors
Published in 2017 6th Mediterranean Conference on Embedded Computing (MECO) (01-06-2017)“…A new high-level fault model and test generation method for software-based self-test in microprocessors (MP) is proposed and investigated. The model is derived…”
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Conference Proceeding -
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New Fault Models and Self-Test Generation for Microprocessors Using High-Level Decision Diagrams
Published in 2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (13-08-2015)“…The paper presents a novel approach to high-level fault modeling and test generation for microprocessors using High-Level Decision Diagrams (HLDD). A general…”
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Conference Proceeding
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High-level modeling and testing of multiple control faults in digital systems
Published in 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) (01-04-2016)“…A new method for high level fault modeling to improve the test generation for the control parts of digital systems was proposed. We developed a new high-level…”
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Conference Proceeding -
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Software-based self-test generation for microprocessors with high-level decision diagrams
Published in 2014 15th Latin American Test Workshop - LATW (01-03-2014)“…Software-based self-testing (SBST) is a well known non-intrusive method for processor testing. Its applications have been intensively studied by the research…”
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Conference Proceeding -
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Laboratory framework TEAM for investigating the dependability issues of microprocessor systems
Published in 10th European Workshop on Microelectronics Education (EWME) (01-05-2014)“…We propose a laboratory research and student training oriented framework consisting of Test Evaluation Automated Means (TEAM) as a set of tools for evaluating…”
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Conference Proceeding -
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On in-system programming of non-volatile memories
Published in Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2013 (01-06-2013)“…With the continuous growth of capacity of non-volatile memories (NVM) in-system programming (ISP) has become the most time-consuming step in post-assembly…”
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Conference Proceeding