Design and area optimization of CMOS operational amplifier circuit using hybrid flower pollination algorithm for IoT end-node devices

CMOS operational amplifiers are widely used in internet of things (IoT) systems due to their excellent performance at low input voltage. However, the design and optimization of high-performance operational amplifiers are time-consuming processes, even for experienced analog circuit designers. For ci...

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Bibliographic Details
Published in:	Microprocessors and microsystems Vol. 93; p. 104610
Main Authors:	Sasikumar, A., Subramaniyaswamy, V., Jannali, Ramu, Srinivasa Rao, V., Ravi, Logesh
Format:	Journal Article
Language:	English
Published:	Elsevier B.V 01-09-2022
Subjects:	Circuit sizing Design automation Flower pollination algorithm Internet of things Operational amplifier Swarm intelligence Internet of things Design automation Swarm intelligence Operational amplifier Circuit sizing Flower pollination algorithm
Online Access:	Get full text
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Summary:	CMOS operational amplifiers are widely used in internet of things (IoT) systems due to their excellent performance at low input voltage. However, the design and optimization of high-performance operational amplifiers are time-consuming processes, even for experienced analog circuit designers. For circuit designer, it is also difficult to quickly evaluate the feasibility of a given specification in a technology node. This paper presents an optimal sizing of operational amplifiers based on the swarm intelligence method. A hybrid version of the Flower Pollination Algorithm (HFPA) was introduced to solve an analog circuit transistor sizing problem effectively and also efficiently reduce the design search space. The proposed method was employed to reduce the transistor size of an operational amplifier to fit for end-node IoT devices. The simulation results show that the HFPA algorithm improved circuit performance in respect of area, power dissipation, and gain compared with other two existing methods. In addition to simulation results, spice validation through cadence is also employed to validate the specifications of the proposed circuit. Therefore the proposed amplifier design is mostly suitable of IoT end-node devices.
ISSN:	0141-9331 1872-9436
DOI:	10.1016/j.micpro.2022.104610