Search Results - "Jagueneau, T."
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1
Study of the plasma and cleaning impact on a CoWPB material
Published in Microelectronic engineering (01-11-2007)“…Self-aligned barriers (SAB) are investigated for the 45 nm technology node and beyond to improve copper electromigration and stress-migration resistance. The…”
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Journal Article Conference Proceeding -
2
230 GHz self-aligned SiGeC HBT for 90 nm BiCMOS technology
Published in Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting (2004)“…This paper describes a 230 GHz self-aligned SiGeC HBT featuring a selective epitaxial base and an arsenic-doped monocrystalline emitter. These technical…”
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Conference Proceeding -
3
Demonstration of three-dimensional 35nF/mm2 MIM Capacitor integrated in BiCMOS Circuits
Published in 2006 Bipolar/BiCMOS Circuits and Technology Meeting (01-10-2006)“…This paper summarizes the electrical characterization of MIM capacitor realized in three-dimensional. High density of 35nF/mm 2 is obtained with low leakage…”
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Conference Proceeding -
4
Three-dimensional 35 nF/mm/sup 2/ MIM capacitors integrated in BiCMOS technology
Published in Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005 (2005)“…Decoupling applications require high capacitance values. To optimize the chip performances, it appears particularly interesting to integrate them directly in…”
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Conference Proceeding -
5
Deep trench isolation effect on self-heating and RF performances of SiGeC HBTs
Published in Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005 (2005)“…This paper focuses on the effect of deep trench isolation (DTI) on self-heating and electrical performances of state-of-the-art SiGeC heterojunction bipolar…”
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Conference Proceeding -
6
300 GHz f/sub max/ self-aligned SiGeC HBT optimized towards CMOS compatiblity
Published in Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting, 2005 (2005)“…This paper summarizes the work carried out to improve performances of a SiGeC HBT featuring a selective epitaxial base and an arsenic-doped monocrystalline…”
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Conference Proceeding -
7
Fully Optimized Cu based process with dedicated cavity etch for 1.75μm and 1.45μm pixel pitch CMOS Image Sensors
Published in 2006 International Electron Devices Meeting (01-12-2006)“…An innovative process development for sub-2μm CMOS imager sensors is described, leading to tremendous improvements on main pixel parameters like conversion…”
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Conference Proceeding