Search Results - "Iwade, S."

A 90-nm low-power 32-kB embedded SRAM with gate leakage suppression circuit for mobile applications by Nii, K., Tsukamoto, Y., Yoshizawa, T., Imaoka, S., Yamagami, Y., Suzuki, T., Shibayama, A., Makino, H., Iwade, S.

“…In sub-100-nm generation, gate-tunneling leakage current increases and dominates the total standby leakage current of LSIs based on decreasing gate-oxide…”
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Test structure measuring inter- and intralayer coupling capacitance of interconnection with subfemtofarad resolution by Kunikiyo, T., Watanabe, T., Kanamoto, T., Asazato, H., Shirota, M., Eikyu, K., Ajioka, Y., Makino, H., Ishikawa, K., Iwade, S., Inoue, Y.

“…We present a new test structure measuring inter- and intralayer coupling capacitance parasitic to the same target interconnection with subfemtofarad…”
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Analysis of Pull-in Range Limit by Charge Pump Mismatch in a Linear Phase-Locked Loop by Yoshimura, T., Iwade, S., Makino, H., Matsuda, Y.

“…In this paper, we show the relationship between the pull-in range of a linear phase-locked loop (PLL) and the current mismatch of the charge pump that controls…”
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The D30V/MPEG multimedia processor by Takata, H., Watanabe, T., Nakajima, T., Takagaki, T., Sato, H., Mohri, A., Yamada, A., Kanamoto, T., Matsuda, Y., Iwade, S., Horiba, Y.

“…MPEG-2 decoding and encoding are important applications for multimedia systems. Real-time capability and low-cost implementation are the main design…”
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A novel memory cell for multiport RAM on 0.5 μm CMOS Sea-of-Gates by NII, K, MAENO, H, OSAWA, T, IWADE, S, KAYANO, S, SHIBATA, H

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Reexamination of SRAM Cell Write Margin Definitions in View of Predicting the Distribution by Makino, H, Nakata, S, Suzuki, H, Mutoh, S, Miyama, M, Yoshimura, T, Iwade, S, Matsuda, Y

“…Four definitions of static random access memory (SRAM) cell write margins (WMs) were reexamined by analyzing the dependence of the WM on the SRAM cell…”
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A 400MHz 183mW microcontroller in body-tied SOI technology by Sato, H., Itoh, N., Nii, K., Yoshida, K., Nakase, Y., Makino, H., Yamada, A., Arakawa, T., Iwade, S., Hirano, Y., Ipposhi, T.

“…A low-power microcontroller is designed in 0.10/spl mu/m body-tied SOI CMOS technology by reusing existing design resources developed in 0.18/spl mu/m bulk…”
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A high-density data-path generator with stretchable cells by Tsujihashi, Y., Matsumoto, H., Hishimaki, H., Miyanishi, A., Nakao, H., Kitada, O., Iwade, S., Kayano, S., Sakao, M.

“…This paper describes a newly developed module generator for cell-based design which generates a data-path layout comparable to a handcrafted one both in speed…”
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Effect of aging time on the availability of freshly precipitated ferric hydroxide to coastal marine diatoms by YOSHIDA, Masahiko, KUMA, Kenshi, IWADE, Shouei, ISODA, Yutaka, TAKATA, Hyoe, YAMADA, Masumi

“…Cell growth and iron uptake of the coastal marine diatoms Chaetoceros sociale and Thalassiosira weissflogii were studied in the presence of short-aged…”
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Comparative vertical distributions of iron in the Japan Sea, the Bering Sea, and the western North Pacific Ocean by Takata, Hyoe, Kuma, Kenshi, Iwade, Shoei, Isoda, Yutaka, Kuroda, Hiroshi, Senjyu, Tomoharu

“…The vertical distributions of dissolvable (unfiltered) Fe concentrations in semi‐closed oceanic regions, such as the Japan Sea and the Bering Sea, are…”
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Spatial variability of iron in the surface water of the northwestern North Pacific Ocean by Takata, Hyoe, Kuma, Kenshi, Iwade, Shoei, Yamajyoh, Yoshinobu, Yamaguchi, Atsushi, Takagi, Shohgo, Sakaoka, Keiichiro, Yamashita, Youhei, Tanoue, Eiichiro, Midorikawa, Takashi, Kimura, Kan, Nishioka, Jun

“…Sources of natural Fe(III)-complexing organic ligands which control vertical distributions of Fe(III) hydroxide solubilities [Fe(III) solubility,<0.025 μm] and…”
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Realistic scaling scenario for sub-100nm embedded SRAM based on 3-dimensional interconnect simulation by Tsukamoto, Y., Kunikiyo, T., Nii, K., Makino, H., Iwade, S., Ishikawa, K., Inoue, Y.

“…It is still an open problem to elucidate the scaling merit of the embedded SRAM with the Low Operating Power (LOP) MOSFET's fabrication in 50, 70 and 100nm…”
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Non-destructive inverse modeling of copper interconnect structure for 90nm technology node by Kunikiyo, T., Watanabe, T., Kanamoto, T., Asazato, H., Shirota, M., Eikyu, K., Ajioka, Y., Makino, H., Ishikawa, K., Iwade, S., Inoue, Y., Yamashita, K., Kobayashi, M., Gohda, A., Oda, Y., Yamaguchi, R., Umimoto, H., Ohtani, K.

“…We propose non-destructive inverse modeling of copper interconnect cross-sectional structures, which reproduces the pitch dependence of intraand interlayer…”
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Superhyperfine Interaction in {Cu(NH 3 ) 4 } 2+ Ion Complex by Iwade, Shuhei, Okuda, Kiichi, Date, Muneyuki

“…Study of superhyperfine interaction in {Cu(NH3)4}2+ ion complex was done by using the ESR-data-accumulation system. The main purposes of this study are to…”
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A novel memory cell for multiport RAM on 0.5 mu m CMOSSea-of-Gates by Nii, K, Maeno, H, Osawa, T, Iwade, S, Kayano, S, Shibata, H

“…A novel memory cell circuit for multiport RAM on CMOS Sea-of-Gates (SOG) has been proposed. It contributes to the operation both at high speed and at low…”
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A novel memory cell for multiport RAM on 0.5 /spl mu/m CMOS Sea-of-Gates by Nii, K., Maeno, H., Osawa, T., Iwade, S., Kayano, S., Shibata, H.

“…A novel memory cell circuit for multiport RAM on CMOS Sea-of-Gates (SOG) has been proposed. It contributes to the operation both at high speed and at low…”
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Modeling and analysis of interference between phase-locked loops by Mizuno, J., Yoshimura, T., Iwade, S., Makino, H., Matsuda, Y.

“…We study the influence of the interference between the integrated closed-loop circuits such as PLL circuits based on circuit simulation. Two different types of…”
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Accelerated evaluation method for the SRAM cell write margin using word line voltage shift by Makino, H., Nakata, S., Suzuki, H., Morimura, H., Mutoh, S., Miyama, M., Yoshimura, T., Iwade, S., Matsuda, Y.

“…An accelerated evaluation method for the SRAM cell write margin is proposed based on the conventional Write Noise Margin (WNM) definition. The WNM is measured…”
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4-bandx4096-element Schottky-barrier infrared linear image sensor by Denda, M, Kimata, M, Iwade, S, Yutani, N, Kondo, T, Toubouchi, N

“…A multispectral linear array has been developed for remote-sensing applications in the short-wavelength (SW) infrared (IR) band. The device is a monolithic…”
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A 512×512-element PtSi Schottky-barrier infrared image sensor by Kimata, M., Denda, M., Yutani, N., Iwade, S., Tsubouchi, N.

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