Search Results - "Ishikawa, Masaoki"

An ultralow-power-consumption, high-speed, GaAs 256/258 dual-modulus prescaler IC by Maeda, T., Wada, S., Tokushima, M., Ishikawa, M., Yamazaki, J., Fujii, M.

“…A GaAs divide-by-256/258 dual-modulus static prescaler is described. The prescaler has a pulse-swallow counter-type architecture and quasi-differential switch…”
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An 0.1-μm voidless double-deck-shaped (DDS) gate HJFET with reduced gate-fringing-capacitance by Wada, S., Yamazaki, J., Ishikawa, M., Maeda, T.

“…This paper describes a novel double-deck-shaped (DDS) gate technology for 0.1- mu m heterojunction FET's (HJFET's) which have about half the external gate…”
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An ultra-low-power-consumption high-speed GaAs quasi-differential switch flip-flop (QD-FF) by Maeda, T., Numata, K., Fujii, M., Tokushima, M., Wada, S., Fukaishi, M., Ishikawa, M.

“…The developed GaAs static flip-flop operates at a data rate of 10 Gb/s with a power consumption of 2.8 mW at a supply voltage of 0.6 V. The power consumption…”
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A 150 mW 8:1 MUX and a 170 mW 1:8 DEMUX for 2.4 gb/s optical-fiber communication systems using n-AlGaAs/i-InGaAs HJFET's by Fujii, M., Numata, K., Maeda, T., Tokushima, M., Wada, S., Fukaishi, M., Ishikawa, M.

“…An 8:1 multiplexer (MUX) and a 1:8 demultiplexer (DEMUX) for 2.4-Gb/s optical communication systems have been developed using 0.35-/spl mu/m GaAs…”
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A high-speed low-power tri-state driver flip flop for ultra-low supply voltage GaAs heterojunction FET LSI's by Maeda, T., Numata, K., Tokushima, M., Ishikawa, M., Fukaishi, M., Hida, H., Ohno, Y.

“…This paper describes a low-supply-voltage flip flop circuit design. The advantages of low supply voltage are discussed. Based on an analytical circuit delay…”
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A technique for compensating for temperature variation in low-supply-voltage GaAs DCFL circuits by Maeda, Tadashi, Numata, Keiichi, Ohno, Yasuo, Hida, Hikaru, Tokushima, Masatoshi, Fukaishi, Muneo, Ishikawa, Masaoki, Fujii, Masahiro

“…This paper describes a technique for compensating for the thermal variation in DC characteristics and propagation delay for GaAs DCFL circuits. This technique…”
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A novel high-speed low-power tri-state driver flip flop (TD-FF) for ultra-low supply voltage GaAs heterojunction FET LSIs by Maeda, T., Numata, K., Tokushima, M., Ishikawa, M., Fukaishi, M., HIda, H., Ohno, Y.

“…The authors describe a new GaAs static flip flop, called TD-FF (tri-state driver flip flop), for ultra-low supply voltage GaAs heterojunction FET LSIs. The…”
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