Search Results - "Iniewski, K."
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A CMOS IR-UWB Transceiver Design for Contact-Less Chip Testing Applications
Published in IEEE transactions on circuits and systems. II, Express briefs (01-04-2008)“…This paper presents a novel CMOS impulse radio (IR) ultra-wide-band (UWB) transceiver system design for future contact-less chip testing applications using…”
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Journal Article -
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Modelling Polarization Effects in CdZnTe Sensor at Low Bias
Published in 2023 IEEE Nuclear Science Symposium, Medical Imaging Conference and International Symposium on Room-Temperature Semiconductor Detectors (NSS MIC RTSD) (04-11-2023)“…Semi-insulating CdTe and CdZnTe crystals fabricated into pixelated sensors and integrated into radiation detection modules have demonstrated great ability to…”
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Conference Proceeding -
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Recent Results in CZT Detectors for PCCT
Published in 2023 IEEE Nuclear Science Symposium, Medical Imaging Conference and International Symposium on Room-Temperature Semiconductor Detectors (NSS MIC RTSD) (04-11-2023)“…Photon-counting computed tomography (PCCT) is an emerging technology displacing conventional energy-integrating CTs. In this presentation, the status of…”
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Conference Proceeding -
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Photon-counting detector spectral calibration enabling iodine quantification for spectral CT
Published in 2023 IEEE Nuclear Science Symposium, Medical Imaging Conference and International Symposium on Room-Temperature Semiconductor Detectors (NSS MIC RTSD) (04-11-2023)“…Photon-counting detector (PCD) computed tomography (CT) can provide grayscale and spectral images within the same acquisition. To achieve accurate material…”
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Conference Proceeding -
5
Measurements of charge sharing in small pixel CdTe detectors
Published in Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment (11-12-2014)“…CdTe detectors with a thickness of 1mm and a pixel pitch of 250µm have been flip-chip-bonded to the HEXITEC read-out ASIC. The detectors record both the…”
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Improved spectroscopic performance in compound semiconductor detectors for high rate X-ray and gamma-ray imaging applications: A novel depth of interaction correction technique
Published in Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment (21-05-2019)“…In this paper results are presented for a novel charge loss correction algorithm that exploits the process of charge induction within compound semiconductor…”
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CZT detector modeling for coded aperture X-ray diffraction imaging applications
Published in 2014 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC) (01-11-2014)“…CZT detectors are primary candidates for many next-generation X-ray diffraction imaging systems. We have conducted a study to evaluate performance tradeoffs…”
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Conference Proceeding -
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Modeling of MOS varactors and characterizing the tuning curve of a 5-6 GHz LC VCO
Published in 2005 IEEE International Symposium on Circuits and Systems (ISCAS) (2005)“…A novel accumulation-mode MOS varactor model used for characterizing the tuning curve of LC-tank voltage-controlled oscillators (VCOs) is presented. The VCO…”
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A new method for the work-function difference determination using buried-channel MOS transistors
Published in IEEE transactions on electron devices (01-01-1989)“…A method is presented that is based on measuring the dependence of the threshold voltage on the source-bulk bias for a series of buried-channel MOS transistors…”
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A new method for fixed oxide charge determination using a dual-gate MOS capacitor
Published in IEEE transactions on electron devices (01-11-1991)“…A new method for fixed oxide charge determination at the silicon-silicon-dioxide interface is presented. It is based on high-frequency C-V measurements of a…”
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Inverse modeling for doping profile extraction in the presence of interface traps
Published in ICMTS 92 Proceedings of the 1992 International Conference on Microelectronic Test Structures (1992)“…The inverse modeling method for doping profile extraction has been extended to take into account interface trap effects. It is shown that by using both…”
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Conference Proceeding Journal Article -
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Low power 2.5 Gb/s serializer for SOC applications
Published in IEEE Computer Society Annual Symposium on VLSI (2004)“…2.5 Gb/s serializer suitable for system-on-the-chip (SOC) implementation is presented. Phase lock loop architecture is of type IV that results in superior…”
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Conference Proceeding -
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10 GBPS over copper lines - state of the art in VLSI
Published in Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) (2005)“…This paper outlines some of the problems that VLSI designers are solving and provides some estimates on feasibility of future CMOS devices. We outline some of…”
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Conference Proceeding -
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A 2.3GHz CMOS transimpedance preamplifier for optical communication
Published in Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) (2005)“…A 2.3GHz transimpedance preamplifier designed in a TSMC 0.18/spl mu/m CMOS technology for optical communication is presented. A wide-swing cascode (WSC)…”
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Conference Proceeding -
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SERDES technology for gigabit I/O communications in storage area networking
Published in 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (2004)“…The paper reviews SERDES technology for storage area networking. A concept of a data switch is introduced to illustrate important role played by switching and…”
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Conference Proceeding -
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Ultra-low power circuit and system design trade-offs for smart sensor network applications
Published in 2005 International Conference on Information and Communication Technology (2005)“…The presented analysis shows that a system approach, that targets heterogeneous technologies, is clearly needed to address ultra-low power operation of…”
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Reconfigurable 2.5 GHz phase-locked loop for system on chip applications
Published in 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (2004)“…2.5 GHz phase-locked loop (PLL) suitable for system-on-the-chip (SOC) implementation is presented. PLL can be configured as a clock multiplication unit (CMU)…”
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Conference Proceeding -
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Recent advances and future trends in low power wireless systems for medical applications
Published in Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) (2005)“…This paper describes current state-of-the-art research on low power wireless systems for medical applications. Distinct design criteria and challenges in this…”
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Conference Proceeding -
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A 0.65V, 1.9mW CMOS low-noise amplifier at 5GHz
Published in Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) (2005)“…An ultra low-voltage (0.65 V), 5 GHz low noise amplifier (LNA) has been designed, laid out and simulated using Spectre simulator in a standard TSMC 0.18/spl…”
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Conference Proceeding