Search Results - "Imam, Syed Neyaz"
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Conventional 100V UMOS technology with deeper P+ to improve Ids
Published in 2017 6th International Symposium on Next Generation Electronics (ISNE) (01-05-2017)“…An innovative and improved UMOSFET device with low specific on-resistance maintain desired breakdown voltage up to 100V. In this proposed device, p-pillar…”
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Conference Proceeding -
2
A analytical study of depth profiling for MeV implants by using Monte Carlo and Taurus models
Published in 2017 6th International Symposium on Next Generation Electronics (ISNE) (01-05-2017)“…Simulation tools are very important to develop process and design a new device structures. Device characteristics and physics phenomena also can be analyzed…”
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Conference Proceeding -
3
An analysis of doping concentration profile for UHV LDMOS linear P-Top
Published in 2017 International Conference on Electron Devices and Solid-State Circuits (EDSSC) (01-10-2017)“…This paper presents the effect of side diffusion and doping concentration profile produced by two different ion implantation model for UHV LDMOS device with…”
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Conference Proceeding -
4
Investigation of ruggedness failure and UIS performance improvement by using drain engineering technique in UHV-JFET
Published in 2017 International Conference on Electron Devices and Solid-State Circuits (EDSSC) (01-10-2017)“…This paper investigates the failure mechanism of Ultra High Voltage JFET (UHV-JFET) under Unclamped Inductive Switching (UIS) test. We explain the ruggedness…”
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Conference Proceeding