Search Results - "Hwa Sung Rhee"
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1
In situ growth of an epitaxial CoSi2 layer on a Si (100) substrate by reactive chemical-vapor deposition using a cobalt metallorganic source
Published in Applied physics letters (24-05-1999)“…Uniform epitaxial CoSi2 layers have been grown in situ on a (100) Si substrate at temperatures above 600 °C by reactive chemical-vapor deposition of…”
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Journal Article -
2
A partially insulated field-effect transistor (PiFET) as a candidate for scaled transistors
Published in IEEE electron device letters (01-06-2004)“…Highly manufacturable partially insulated field-effect transistors (PiFETs) were fabricated by using Si-SiGe epitaxial growth and selective SiGe etch process…”
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3
Epitaxial growth of a (100) CoSi2 layer from carbonic cobalt films deposited on (100) Si substrate using an organometallic source
Published in Applied physics letters (15-02-1999)“…We report the epitaxial growth of a (100) CoSi2 layer on Si (100) substrate by the diffusion of Co from an amorphous carbonic cobalt film. The employment of an…”
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4
Combination of ultraviolet exposure and thermal post-treatment to obtain high quality HfO2 thin films
Published in Ceramics international (01-04-2021)“…The characteristics of HfO2 thin films obtained with and without ultraviolet (UV) exposure post-treatment are discussed. First, 30-nm-thick HfO2 thin films are…”
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Dramatically enhanced performance of recessed SiGe source-drain PMOS by in-situ etch and regrowth technique (InSERT)
Published in Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005 (2005)“…A novel mass-production-worthy in-situ etch and regrowth technique (InSERT) for recessed SiGe source-drain (SD) PMOS is introduced. The unique source drain…”
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Conference Proceeding
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Hydrogen plasma pretreatment effect on the deposition of aluminum thin films from metalorganic chemical vapor deposition using dimethylethylamine alane
Published in Journal of vacuum science & technology. A, Vacuum, surfaces, and films (01-05-1999)“…To study the effect of pretreatment of substrates on the deposition behavior of Al thin films, the surfaces of TiN and SiO 2 substrates were exposed to…”
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Journal Article -
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Systematic Study of Process Impact on FinFET Reliability
Published in 2021 IEEE International Reliability Physics Symposium (IRPS) (01-03-2021)“…Reliability of Core and IO FinFET is extensively investigated with various process steps at Fin, Source/ Drain, sacrificial Gate-Metal, and High-Pressure D2…”
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Conference Proceeding -
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Reliability on EUV Interconnect Technology for 7nm and beyond
Published in 2020 IEEE International Reliability Physics Symposium (IRPS) (01-04-2020)“…In this research, we present the robust reliability performance of BEOL by utilizing EUV single patterning and further feasibility of EUV process for future…”
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Conference Proceeding -
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Trap Density Modulation for IO FinFET NBTI Improvement
Published in 2020 IEEE International Reliability Physics Symposium (IRPS) (01-04-2020)“…Basic Reliability of IO FinFET is studied with various process options and extensive trap density investigation. It is observed that the NBTI margin on High…”
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Conference Proceeding -
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Negative bias temperature instability of carrier-transport enhanced pMOSFET with performance boosters
Published in IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest (2005)“…The effects of mobility boosters such as straining technologies and modified transport direction emerging for 65 nm pFET and beyond on negative bias…”
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Effective reduction of threshold voltage variability and standby leakage using advanced co-implantation and laser anneal for low power applications
Published in 2008 IEEE International Electron Devices Meeting (01-12-2008)“…We have successfully reduced threshold voltage variation by combination of co-implantation and laser spike anneal on 45 nm low power SoC platform with…”
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Conference Proceeding -
12
Self-Amorphizing Gas Cluster Ion Beam Technology and Combination with Laser Spike Anneal for Highly Scaled Source Drain Junction
Published in 2006 International Workshop on Junction Technology (2006)“…High energy borane (B 2 H 6 ) gas cluster ion beam (GCIB) successfully enables a sub-10 nm box-shaped dopant profile without channeling tail, and steep…”
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Conference Proceeding -
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Improved 1/f Noise Characteristics in Locally Strained Si CMOS Using Hydrogen-Controlled Stress Liners and Embedded SiGe
Published in 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers (2006)“…This paper reports the first experimental demonstration of improved 1/f noise characteristics in a locally strained Si MOS through hydrogen-controlled stress…”
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Conference Proceeding -
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The drive currents improvement of FDSOI MOSFETs with undoped Si epitaxial channel and elevated source/drain structure
Published in 2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125) (2000)“…Fully-depleted silicon-on-insulator (FDSOI) MOSFETs are very attractive for low-voltage applications due to ideal subthreshold slope, short channel effect…”
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15
Growth of in situ CoSi 2 layer by metalorganic chemical vapor deposition on Si tips and its field-emission properties
Published in Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures (01-03-2001)“…We prepared Si emitters coated with a metalorganic chemical vapor deposited CoSi 2 layer to improve emission properties. The CoSi 2 layer was grown in situ by…”
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Journal Article -
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Double raised source/drain transistor with 50 nm gate length on 17 nm UTF-SOI for 1.1 /spl mu/m/sup 2/ embedded SRAM technology
Published in IEEE International Electron Devices Meeting 2003 (2003)“…Double raised source/drain (DR) ultra thin film (UTF) SOI CMOSFETs were experimented for the first time. Double Si selective epitaxial growth (SEG) process…”
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Conference Proceeding -
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Highly controllable cyclic selective epitaxial growth (CySEG) for 65nm CMOS technology and beyond
Published in IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 (2004)“…A new novel raised source/drain (RSD) process by using cyclic selective epitaxial growth (CySEG) has been firstly proposed to enhance device performance for…”
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Conference Proceeding -
18
A new double-layered structure for mass-production-worthy CMOSFETs with poly-SiGe gate
Published in 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303) (2002)“…A new double-layered structure of poly-Si/SiGe gate has been proposed to improve the current performance of CMOSFETs and the reproducibility of devices. The…”
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Conference Proceeding