Search Results - "Hussien, Amr M.A."
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1
A simplified radix-4 successive cancellation decoder with partial sum lookahead
Published in International journal of electronics and communications (01-11-2018)“…Polar codes recently received high attention by researchers as proven to approach channel capacity at higher codeword length. However, the decoding latency…”
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Journal Article -
2
Energy Aware Mapping for Reconfigurable Wireless MPSoCs
Published in IEEE transactions on very large scale integration (VLSI) systems (01-02-2015)“…Energy management for multimode software defined radio systems remains a daunting challenge. This brief develops a high level framework that generates a…”
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Journal Article -
3
MPMAP : A high level synthesis and mapping tool for MPSoCs
Published in 2013 Asilomar Conference on Signals, Systems and Computers (01-11-2013)“…The design of efficient multiprocessor systems on chip (MPSoC) is a daunting challenge. This challenge is driven by the increasing demand in achieving high…”
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Conference Proceeding -
4
A combined channel and hardware noise resilient Viterbi decoder
Published in 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers (01-11-2010)“…Recent power reduction techniques aggressively modulate the supply voltage of embedded buffering memories allowing acceptable hardware errors to flow through…”
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Conference Proceeding -
5
Energy aware task mapping algorithm for heterogeneous MPSoC based architectures
Published in 2011 IEEE 29th International Conference on Computer Design (ICCD) (01-10-2011)“…Energy Management for multi-mode Software Defined Radio (SDR) systems remains a daunting challenge. In this paper, we focus on the issue of task allocation for…”
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Conference Proceeding -
6
Radix-4 successive cancellation decoding of polar codes with partial sum lookahead
Published in 2017 29th International Conference on Microelectronics (ICM) (01-12-2017)“…Polar codes have been proposed recently as proven to asymptotically achieve channel capacity for memoryless channels. However, realization of high throughput…”
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Conference Proceeding -
7
Low overhead correction scheme for unreliable LDPC buffering
Published in 2013 IEEE Global Conference on Signal and Information Processing (01-12-2013)“…Aggressive voltage overscaling (VOS) has been recently adopted to reduce the power consumption of embedded memories. While this affects reliability, several…”
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Conference Proceeding -
8
A Class of Low Power Error Compensation Iterative Decoders
Published in 2011 IEEE Global Telecommunications Conference - GLOBECOM 2011 (01-12-2011)“…Recent power reduction techniques aggressively modulate the supply voltage of embedded buffering memories allowing acceptable hardware errors to flow through…”
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Conference Proceeding