A set of analytic formulas for capacitance of VLSI interconnects of trapezium shape

In VLSI timing analysis, a quick and accurate extraction of interconnect line to line and line to ground capacitance is very important. This paper presents a set of analytic formulas for the capacitance of one, two, and three trapezium interconnect lines over a ground plane which show better than 7%...

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Bibliographic Details
Published in:	IEEE transactions on electron devices Vol. 41; no. 8; pp. 1467 - 1469
Main Authors:	Samudra, G.S., Hsio Lin Lee
Format:	Journal Article
Language:	English
Published:	New York, NY IEEE 01-08-1994 Institute of Electrical and Electronics Engineers
Subjects:	Applied sciences Capacitance Clocks Conductors Design. Technologies. Operation analysis. Testing Electronics Exact sciences and technology Geometry Integrated circuit interconnections Integrated circuits Modems Numerical simulation Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Shape Timing Very large scale integration VLSI circuit Interconnection Integrated circuit Theoretical study Capacitance Time curve Modeling Analytic representation Electrical characteristic
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Summary:	In VLSI timing analysis, a quick and accurate extraction of interconnect line to line and line to ground capacitance is very important. This paper presents a set of analytic formulas for the capacitance of one, two, and three trapezium interconnect lines over a ground plane which show better than 7% agreement with the capacitance values from the numerical simulation.< >
Bibliography:	ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23
ISSN:	0018-9383 1557-9646
DOI:	10.1109/16.297745