Search Results - "Hoyt, J.L"

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  1. 1

    Design of Tunneling Field-Effect Transistors Using Strained-Silicon/Strained-Germanium Type-II Staggered Heterojunctions by Nayfeh, O.M., Chleirigh, C.N., Hennessy, J., Gomez, L., Hoyt, J.L., Antoniadis, D.A.

    Published in IEEE electron device letters (01-09-2008)
    “…Heterojunction tunneling field-effect transistors (HTFETs) that use strained-silicon/strained-germanium type-II staggered band alignment for band-to-band…”
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    Journal Article
  2. 2

    Fabrication and analysis of deep submicron strained-Si n-MOSFET's by Rim, K., Hoyt, J.L., Gibbons, J.F.

    Published in IEEE transactions on electron devices (01-07-2000)
    “…Deep submicron strained-Si n-MOSFETs were fabricated on strained Si/relaxed Si/sub 0.8/Ge/sub 0.2/ heterostructures. Epitaxial layer structures were designed…”
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    Journal Article
  3. 3

    Enhanced Hole Transport in Short-Channel Strained-SiGe p-MOSFETs by Gomez, L., Hashemi, P., Hoyt, J.L.

    Published in IEEE transactions on electron devices (01-11-2009)
    “…Hole mobility and velocity are extracted from scaled strained-Si 0.45 Ge 0.55 channel p-MOSFETs on insulator. Devices have been fabricated with sub-100-nm gate…”
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    Journal Article
  4. 4

    Gate-All-Around n-MOSFETs With Uniaxial Tensile Strain-Induced Performance Enhancement Scalable to Sub-10-nm Nanowire Diameter by Hashemi, P., Gomez, L., Hoyt, J.L.

    Published in IEEE electron device letters (01-04-2009)
    “…The effects of high-level uniaxial tensile strain on the performance of gate-all-around (GAA) Si n-MOSFETs are investigated for nanowire (NW) diameters down to…”
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    Journal Article
  5. 5

    A physically based analytical model for the threshold voltage of strained-Si n-MOSFETs by Nayfeh, H.M., Hoyt, J.L., Antoniadis, D.A.

    Published in IEEE transactions on electron devices (01-12-2004)
    “…A physically based analytic model for the threshold voltage V/sub t/ of long-channel strained-Si--Si/sub 1-x/Ge/sub x/ n-MOSFETs is presented and confirmed…”
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    Journal Article
  6. 6

    Thickness Dependence of Hole Mobility in Ultrathin SiGe-Channel p-MOSFETs by Chleirigh, C.N., Theodore, N.D., Fukuyama, H., Mure, S., Ehrke, H.-U., Domenicucci, A., Hoyt, J.L.

    Published in IEEE transactions on electron devices (01-10-2008)
    “…A fundamental understanding of the mechanisms responsible for the dependence of hole mobility on SiGe channel layer thickness is presented for channel…”
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    Journal Article
  7. 7

    Electron Transport in Strained-Silicon Directly on Insulator Ultrathin-Body n-MOSFETs With Body Thickness Ranging From 2 to 25 nm by Gomez, L., Aberg, I., Hoyt, J.L.

    Published in IEEE electron device letters (01-04-2007)
    “…The electron effective mobility in ultrathin-body n-channel metal-oxide-semiconductor field-effect transistors fabricated on Ge-free 30% strained-Si directly…”
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    Journal Article
  8. 8

    Electron mobility enhancement in strained-Si n-MOSFETs fabricated on SiGe-on-insulator (SGOI) substrates by Zhi-Yuan Cheng, Currie, M.T., Leitz, C.W., Taraschi, G., Fitzgerald, E.A., Hoyt, J.L., Antoniadas, D.A.

    Published in IEEE electron device letters (01-07-2001)
    “…We demonstrate electron mobility enhancement in strained-Si n-MOSFETs fabricated on relaxed Si/sub 1-x/Ge/sub x/-on-insulator (SGOI) substrates with a high Ge…”
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    Journal Article
  9. 9

    Ultrathin-body strained-Si and SiGe heterostructure-on-insulator MOSFETs by Aberg, I., Cait Ni Chleirigh, Hoyt, J.L.

    Published in IEEE transactions on electron devices (01-05-2006)
    “…The combination of channel mobility-enhancement techniques such as strain engineering with nonclassical MOS device architectures, such as ultrathin-body (UTB)…”
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    Journal Article
  10. 10

    Electron mobility enhancement in strained-Si n-type metal-oxide-semiconductor field-effect transistors by Welser, J., Hoyt, J.L., Gibbons, J.F.

    Published in IEEE electron device letters (01-03-1994)
    “…Enhanced performance is demonstrated in n-type metal-oxide-semiconductor field-effect transistors with channel regions formed by pseudomorphic growth of…”
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    Journal Article
  11. 11

    Hole transport in UTB MOSFETs in strained-Si directly on insulator with strained-Si thickness less than 5 nm by Aberg, I., Hoyt, J.L.

    Published in IEEE electron device letters (01-09-2005)
    “…Hole transport is studied in ultrathin body (UTB) MOSFETs in strained-Si directly on insulator (SSDOI) with a Si thickness down to 1.4 nm. In these Ge-free…”
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    Journal Article
  12. 12

    Measurement of Enhanced Gate-Controlled Band-to-Band Tunneling in Highly Strained Silicon-Germanium Diodes by Nayfeh, O.M., Chleirigh, C.N., Hoyt, J.L., Antoniadis, D.A.

    Published in IEEE electron device letters (01-05-2008)
    “…Strained silicon-germanium (Si 0.6 Ge 0.4 ) gated diodes have been fabricated and analyzed. The devices exhibit significantly enhanced gate-controlled…”
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    Journal Article
  13. 13

    Influence of high channel doping on the inversion layer electron mobility in strained silicon n-MOSFETs by Nayfeh, H.M., Leitz, C.W., Pitera, A.J., Fitzgerald, E.A., Hoyt, J.L., Antoniadis, D.A.

    Published in IEEE electron device letters (01-04-2003)
    “…In this letter, we investigate the dependence of electron inversion layer mobility on high-channel doping required for sub-50-nm MOSFETs in strained silicon…”
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    Journal Article
  14. 14

    Impact of ion implantation damage and thermal budget on mobility enhancement in strained-Si N-channel MOSFETs by Guangrui Xia, Nayfeh, H.M., Lee, M.L., Fitzgerald, E.A., Antoniadis, D.A., Anjum, D.H., Jian Li, Hull, R., Klymko, N., Hoyt, J.L.

    Published in IEEE transactions on electron devices (01-12-2004)
    “…The impact of processing factors such as ion implantation and rapid thermal annealing on mobility enhancement in strained-Si n-channel…”
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    Journal Article
  15. 15

    Strained-Si-strained-SiGe dual-channel layer structure as CMOS substrate for single workfunction metal-gate technology by Shaofeng Yu, Jongwan Jung, Hoyt, J.L., Antoniadis, D.A.

    Published in IEEE electron device letters (01-06-2004)
    “…The strained-Si-strained-SiGe dual-channel layer substrate is known for its mobility advantage. This letter investigates its potential as a CMOS substrate that…”
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    Journal Article
  16. 16

    Mobility enhancement in dual-channel P-MOSFETs by Jongwan Jung, Shaofeng Yu, Lee, M.L., Hoyt, J.L., Fitzgerald, E.A., Antoniadis, D.A.

    Published in IEEE transactions on electron devices (01-09-2004)
    “…Hole mobility is characterized in P-MOSFETs with a layered substrate consisting of tensile strained Si cap on a compressively strained Si/sub 0.4/Ge/sub 0.6/…”
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    Journal Article
  17. 17

    Fully depleted strained-SOI n- and p-MOSFETs on bonded SGOI substrates and study of the SiGe/BOX interface by Zhiyuan Cheng, Pitera, A.J., Lee, M.L., Jongwan Jung, Hoyt, J.L., Antoniadis, D.A., Fitzgerald, E.A.

    Published in IEEE electron device letters (01-03-2004)
    “…Fully depleted strained-Si n- and p-MOSFETs have been demonstrated on bonded-SiGe-on-insulator (SGOI) substrates. The fully depleted devices show significant…”
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    Journal Article
  18. 18

    Electron and hole mobility enhancements in sub-10 nm-thick strained silicon directly on insulator fabricated by a bond and etch-back technique by Aberg, I., Olubuyide, O.O., Chleirigh, C.N., Lauer, I., Antoniadis, D.A., Li, J., Hull, R., Hoyt, J.L.

    “…Electron and hole mobility enhancements are studied in Ge-free strained silicon directly on insulator fabricated by a bond and etch-back technique, for the…”
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    Conference Proceeding
  19. 19
  20. 20

    Evaluation of the valence band discontinuity of Si/Si/sub 1-x/Ge/sub x//Si heterostructures by application of admittance spectroscopy to MOS capacitors by Takagi, S., Hoyt, J.L., Rim, K., Welser, J.J., Gibbons, J.F.

    Published in IEEE transactions on electron devices (01-02-1998)
    “…In this study, admittance spectroscopy is applied for the first time to MOS capacitors fabricated on Si/Si/sub 1-x/Ge/sub x//Si double-heterostructures, in…”
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    Journal Article