Search Results - "Houston, T.W."

A novel dynamic Vt circuit configuration by Houston, T.W.

“…Summary form only given. It is a well known dilemma that as supply voltages are scaled lower, CMOS threshold voltages must also be scaled lower to maintain…”
Get full text

45nm low-power CMOS SoC technology with aggressive reduction of random variation for SRAM and analog transistors by Ekbote, S., Benaissa, K., Obradovic, B., Liu, S., Shichijo, H., Hou, F., Blythe, T., Houston, T.W., Martin, S., Taylor, R., Singh, A., Yang, H., Baldwin, G.

“…Mobile system-on-chip (SoC) technologies require high-quality analog active and passive components along with low-power CMOS and dense SRAM. However, area…”
Get full text

A guide to simulation of hysteretic gate delays based on physical understanding [SOI logic] by Houston, T.W., Unnikrishnan, S.

“…Studies of floating body effects in SOI transistors and circuits have been widely reported. Nevertheless, in part because of the complexities of the device…”
Get full text

Design issues and insights for low-voltage high-density SOI DRAM by Fossum, J.G., Meng-Hsueh Chiang, Houston, T.W.

“…A physics-based study of floating-body effects on the operation of SOI DRAM is described. The study, which is based on device and circuit simulations using a…”
Get full text

The dynamic stability of a 10T SRAM compared to 6T SRAMs at the 32nm node using an accelerated Monte Carlo technique by Seshadri, A., Houston, T.W.

“…An accelerated Monte Carlo technique is proposed to analyze the dynamic stability margin of SRAM cells. This technique greatly improves accuracy of the desired…”
Get full text

WP-A7 the elimination of channeling effects on V T uniformity for silicon MESFET VLSI by Houston, T.W., Darley, H.M.

Get full text

WP-A7 the elimination of channeling effects on VTuniformity for silicon MESFET VLSI by Houston, T.W., Darley, H.M.

Get full text

Behavior of indium in thin SOI films by Jacobs, J.B., Schiebel, R., Joyner, K., Houston, T.W.

“…The behavior of indium implanted in silicon-on-insulator (SOI) material is explored by using SIMS analysis to obtain the doping concentration profile as a…”
Get full text

Short channel effects and delay hysteresis for 0.25 /spl mu/m SOI technology with minimal process changes from the bulk technology by Jacobs, J.B., Unnikrishnan, S., Grider, T., Thakar, G.V., Joyner, K., Eklund, R.H., Houston, T.W.

“…Partially depleted (PD) SOI technology has been suggested as a method for achieving high performance at low voltage and low power for next generation circuit…”
Get full text

Model for CMOS/SOI single-event vulnerability by Kerns, S.E., Massengill, L.W., Kerns, D.V., Alles, M.L., Houston, T.W., Lu, H., Hite, L.R.

“…A lumped-parameter model derived from transistor characterization data has been used in SPICE analyses to study and predict the single-event-upset thresholds…”
Get full text

Characterization of bit transistors in a functional SRAM by Xiaowei Deng, Wah Kit Loh, Pious, B., Houston, T.W., Liu, L., Bashar Khan, Corum, D.

“…A direct bit transistor access (DBTA) scheme is proposed and implemented in 8 Mb SRAMpsilas at 65 nm and 45 nm nodes. It allows, for the first time,…”
Get full text

An SEU resistant 256 K SOI SRAM by Hite, L.R., Lu, H., Houston, T.W., Hurta, D.S., Bailey, W.E.

“…A novel SEU (single event upset) resistant SRAM (static random access memory) cell has been implemented in a 256 K SOI (silicon on insulator) SRAM that has…”
Get full text

Comments on "Higher harmonic generation in CMOS/SOS ring oscillators" by Houston, T.W.

“…Arguments presented in the referenced paper [1] imply that higher order modes of oscillation should not be expected in ring oscillators with a small number of…”
Get full text

Comments on "Silicon MESFET digital circuit techniques" by Houston, T.W., Darley, H.M.

“…See also ibid., vol.SC-16, p.578-84 (Oct. 1981). It is shown that the design criterion for MESFET ED logic assumed by Hartgring et al.-that the low voltage…”
Get full text

Design and performance of SOI pass transistors for 1 Gbit DRAMs by Yin Hu, Teng, C.W., Houston, T.W., Joyner, K., Aton, T.J.

“…Both partially and fully depleted NMOS pass transistors were designed and fabricated on SIMOX substrates. Using a p+ gate design, V/sub th/=1 V and I/sub…”
Get full text

Optimization of self-aligned silicon MESFETs for VLSI at micron dimensions by Darley, H.M., Houston, T.W.

“…This paper discusses the experimental optimization of the structural parameters of MESFET devices using a new self-aligned MESFET structure that incorporates a…”
Get full text

A 553 K-transistor LISP processor chip by Bosshart, P.W., Hewes, C.R., Ales, M.D., Chang, M.-C., Chau, K.K., Fasham, K., Hoac, C.C., Houston, T.W., Kalyan, V., Lusky, S.L., Mahant-Shetti, S.S., Matzke, D.J., Ruparel, K.N., Sexton, J.F., Shaw, C.-H., Shridhar, T., Stark, D., Lee, A.L.

“…The authors describe a LISP microprocessor which includes over 550 K transistors, has 114 K of on-chip RAM, and runs instructions in a single 30-ns clock…”
Get full text

Radiation Hardness of a Silicon MESFET 4K x 1 sRAM by Houston, T. W., Hite, L. R., Darley, H. M., Shedd, W. M., Zugich, M. H., Lapierre, D. C.

Get full text

Processing and transistor characteristics of a 256 K SRAM fabricated on SIMOX by Bailey, W.E., Lu, H., Blake, T.G.W., Hite, L.R., Mei, P., Hurta, D., Houston, T.W., Pollack, G.P.

“…The authors describe the one-micron CMOS technology for a 256 K SRAM (static random-access memory) on SIMOX (separation by implanted oxygen) which produced…”
Get full text

Computer Aided Design of Broadband and Low-Noise Microwave Amplifiers by Houston, T.W., Read, L.W.

“…The design of low-noise broadband microwave integrated amplifiers is particularly suited to the application of optimization techniques. Circuit theory is…”
Get full text