Search Results - "Hirtzlin, T"

Convolution neural network inference using frequency modulation in computational phase-change memory by Trabelsi, A., Cagli, C., Hirtzlin, T., Martin, S., Billoint, O., Vianello, E., Sousa, V., Bourgeois, G., Andrieu, F.

“…In [1] we reported for the first time a frequency modulation method to control the conductance level in PCM cells. This increases the programming reliability…”
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Hardware calibrated learning to compensate heterogeneity in analog RRAM-based Spiking Neural Networks by Moro, Filippo, Esmanhotto, E., Hirtzlin, T., Castellani, N., Trabelsi, A., Dalgaty, T., Molas, G., Andrieu, F., Brivio, S., Spiga, S., Indiveri, G., Payvand, M., Vianello, E.

“…Spiking Neural Networks (SNNs) can unleash the full power of analog Resistive Random Access Memories (RRAMs) based circuits for low power signal processing…”
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Energy-Efficient Bayesian Inference Using Near-Memory Computation with Memristors by Turck, C., Harabi, K.-E., Hirtzlin, T., Vianello, E., Laurent, R., Droulez, J., Bessiere, P., Bocquet, M., Portal, J.-M., Querlioz, D.

“…Bayesian reasoning is a machine learning approach that provides explainable outputs and excels in small-data situations with high uncertainty. However, it…”
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Experimental demonstration of Single-Level and Multi-Level-Cell RRAM-based In-Memory Computing with up to 16 parallel operations by Esmanhotto, E., Hirtzlin, T., Castellani, N., Martin, S., Giraud, B., Andrieu, F., Nodin, J. F., Querlioz, D., Portal, J-M., Vianello, E.

“…Crossbar arrays of resistive memories (RRAM) hold the promise of enabling In-Memory Computing (IMC), but essential challenges due to the impact of device…”
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CAPC: A Configurable Analog Pop-Count Circuit for Near-Memory Binary Neural Networks by Jebali, F., Majumdar, A., Laborieux, A., Hirtzlin, T., Vianello, E., Walder, J.P., Bocquet, M., Querlioz, D., Portal, J. M.

“…Currently, a major trend in artificial intelligence is to implement neural networks at the edge, within circuits with limited memory capacity. To reach this…”
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Outstanding Bit Error Tolerance of Resistive RAM-Based Binarized Neural Networks by Hirtzlin, T., Bocquet, M., Klein, J.-O., Nowak, E., Vianello, E., Portal, J.-M., Querlioz, D.

“…Resistive random access memories (RRAM) are novel nonvolatile memory technologies, which can be embedded at the core of CMOS, and which could be ideal for the…”
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Synaptic metaplasticity with multi-level memristive devices by D'Agostino, S., Moro, F., Hirtzlin, T., Arcamone, J., Castellani, N., Querlioz, D., Payvand, M., Vianello, E.

“…Deep learning has made remarkable progress in various tasks, surpassing human performance in some cases. However, one drawback of neural networks is…”
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Frequency modulation of conductance level in PCM device for neuromorphic applications by Trabelsi, A., Cagli, C., Hirtzlin, T., Cueto, O., Cyrille, M. C., Vianello, E., Meli, V., Sousa, V., Bourgeois, G., Andrieu, F.

“…In this study we report for the first time the control of conductance level in PCM cells by means of a frequency modulation of progressive SET pulses. We show…”
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Hybrid FeRAM/RRAM Synaptic Circuit Enabling On-Chip Inference and Learning at the Edge by Martemucci, M., Rummens, F., Hirtzlin, T., Martin, S., Guille, O., Januel, T., Carabasse, C., Billoint, O., Laguerre, J., Coignus, J., Vincent, A. F., Querlioz, D., Grenouillet, L., Saighi, S., Vianello, E.

“…This paper presents an experimental demonstration of a hybrid FeRAM/RRAM synaptic circuit. The circuit incorporates Metal-Ferroelectric-Metal stacks, which…”
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Bayesian In-Memory Computing with Resistive Memories by Turck, C., Bonnet, D., Harabi, K.-E., Dalgaty, T., Ballet, T., Hirtzlin, T., Pontlevy, A., Renaudineau, A., Esmanhotto, E., Bessiere, P., Droulez, J., Laurent, R., Bocquet, M., Portal, J.-M., Vianello, E., Querlioz, D.

“…This paper explores three approaches using resistive memory for Bayesian near-memory and in-memory computing, leveraging their inherent randomness. The…”
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Hybrid Analog-Digital Learning with Differential RRAM Synapses by Hirtzlin, T., Bocquet, M., Ernoult, M., Klein, J. - O., Nowak, E., Vianello, E., Portal, J. - M., Querlioz, D.

“…Exploiting the analog properties of RRAM cells for learning is a compelling approach, but which raises important challenges in terms of CMOS overhead, impact…”
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Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse by Laborieux, A., Bocquet, M., Hirtzlin, T., Klein, J.-O., Diez, L. Herrera, Nowak, E., Vianello, E., Portal, J.-M., Querlioz, D.

“…The design of systems implementing low precision neural networks with emerging memories such as resistive random access memory (RRAM) is a major lead for…”
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1S1R sub-threshold operation in Crossbar arrays for low power BNN inference computing by Lopez, J. Minguet, Rummens, F., Reganaz, L., Heraud, A., Hirtzlin, T., Grenouillet, L., Navarro, G., Bernard, M., Carabasse, C., Castellani, N., Meli, V., Martin, S., Magis, T., Vianello, E., Sabbione, C., Deleruyelle, D., Bocquet, M., Portal, J. M., Molas, G., Andrieu, F.

“…We experimentally validated the sub-threshold reading strategy in OxRAM+OTS crossbar arrays for low precision inference in Binarized Neural Networks. In order…”
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Experimental demonstration of Single-Level and Multi-Level-Cell RRAM-based In-Memory Computing with up to 16 parallel operations by Esmanhotto, E, Hirtzlin, T, Castellani, N, Martin, S, Giraud, B, Andrieu, F, Nodin, J. F, Querlioz, D, Portal, J-M, Vianello, E

“…Crossbar arrays of resistive memories (RRAM) hold the promise of enabling In-Memory Computing (IMC), but essential challenges due to the impact of device…”
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Hardware calibrated learning to compensate heterogeneity in analog RRAM-based Spiking Neural Networks by Moro, Filippo, Esmanhotto, E, Hirtzlin, T, Castellani, N, Trabelsi, A, Dalgaty, T, Molas, G, Andrieu, F, Brivio, S, Spiga, S, Indiveri, G, Payvand, M, Vianello, E

“…Spiking Neural Networks (SNNs) can unleash the full power of analog Resistive Random Access Memories (RRAMs) based circuits for low power signal processing…”
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A Multimode Hybrid Memristor-CMOS Prototyping Platform Supporting Digital and Analog Projects by Harabi, K.-E., Turck, C., Drouhin, M., Renaudineau, A., Bersani-Veroni, T., Querlioz, D., Hirtzlin, T., Vianello, E., Bocquet, M, Portal, J.-M.

“…We present an integrated circuit fabricated in a process co-integrating CMOS and hafnium-oxide memristor technology, which provides a prototyping platform for…”
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Microwave neural processing and broadcasting with spintronic nano-oscillators by Talatchian, P, Romera, M, Tsunegi, S, Araujo, F. Abreu, Cros, V, Bortolotti, P, Trastoy, J, Yakushiji, K, Fukushima, A, Kubota, H, Yuasa, S, Ernoult, M, Vodenicarevic, D, Hirtzlin, T, Locatelli, N, Querlioz, D, Grollier, J

“…Can we build small neuromorphic chips capable of training deep networks with billions of parameters? This challenge requires hardware neurons and synapses with…”
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Microwave Neural Processing and Broadcasting with Spintronic Nano-Oscillators by Talatchian, P., Romera, M., Tsunegi, S., Araujo, F. Abreu, Cros, V., Bortolotti, P., Trastoy, J., Yakushiji, K., Fukushima, A., Kubota, H., Yuasa, S., Ernoult, M., Vodenicarevic, D., Hirtzlin, T., Locatelli, N., Querlioz, D., Grollier, J.

“…Can we build small neuromorphic chips capable of training deep networks with billions of parameters? This challenge requires hardware neurons and synapses with…”
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