Search Results - "Hilgenstock, J."
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A video signal processor for MIMD multiprocessing
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 35th annual conference on Design automation; 15-19 June 1998 (01-01-1998)“…The video signal processor AxPe1280V has been developed forimplementation of different video coding applications accordingto standards like ITU-T H.261/H.263,…”
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Conference Proceeding
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2
Implementation of a multiprocessor system with distributed embedded DRAM on a large area integrated circuit
Published in Proceedings IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (2000)“…An architecture of a multiprocessor coding system suitable for large area integration has been developed. Application field is video coding according to the…”
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Conference Proceeding -
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Architecture of a multiprocessor system with embedded DRAM for large area integration
Published in 1997 Proceedings Second Annual IEEE International Conference on Innovative Systems in Silicon (1997)“…The architecture of a MIMD-based multiprocessor system for video coding applications is presented. It consists of a number of identical bus-connected…”
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Conference Proceeding -
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A single-chip video signal processing system with embedded DRAM
Published in 2000 IEEE Workshop on SiGNAL PROCESSING SYSTEMS. SiPS 2000. Design and Implementation (Cat. No.00TH8528) (2000)“…A programmable single-chip multiprocessor system for video signal processing applications has been developed. It integrates four processing nodes with on-chip…”
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Conference Proceeding -
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Memory organization of a single-chip video signal processing system with embedded DRAM
Published in Proceedings Ninth Great Lakes Symposium on VLSI (1999)“…A programmable single-chip multiprocessor system for video coding applications has been developed. It integrates four processing elements, on-chip DRAM, and…”
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Conference Proceeding -
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A large-area integrated multiprocessor system for video applications
Published in IEEE design & test of computers (01-01-2002)“…This 16.89 cm/sup 2/ multiprocessor system performs coding of high-resolution video streams in real time. Redundancy and self-reconfiguration techniques ensure…”
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Journal Article -
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Design of a development system for multimedia applications based on a single chip multiprocessor array
Published in Proceedings of Third International Conference on Electronics, Circuits, and Systems (1996)“…A development system for investigations on video signal processing in multimedia applications has been developed. This system is based on the single chip…”
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Conference Proceeding -
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A single chip video coding system with embedded DRAM frame memory for stand-alone applications
Published in Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372) (1998)“…A video coding subsystem for monolithic integration in a 0.25 /spl mu/m CMOS technology has been developed. It consists of a programmable video signal…”
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Conference Proceeding -
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A programmable processing element dedicated as building block for a large area integrated multiprocessor system
Published in 1996 Proceedings. Eighth Annual IEEE International Conference on Innovative Systems in Silicon (1996)“…The architecture and implementation of a programmable processing element dedicated as building block for a large area integrated multiprocessor system is…”
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Conference Proceeding Journal Article