Search Results - "Hida, Hikaru"

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  1. 1

    Foldable Kirigami Paper Electronics by Yang, Tilo H., Hida, Hikaru, Ichige, Daiki, Mizuno, Jun, Robert Kao, C., Shintake, Jun

    “…Significant attention is focused on paper electronics (PEs) for developing flexible and recyclable devices. These devices use paper as the substrate on which…”
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    Journal Article
  2. 2

    Analysis and Design of a Dynamic Predistorter for WCDMA Handset Power Amplifiers by Yamanouchi, S., Aoki, Y., Kunihiro, K., Hirayama, T., Miyazaki, T., Hida, H.

    “…This paper presents a dynamic predistorter (PD), which linearizes the dynamic AM-AM and AM-PM of a wideband code division multiple access handset power…”
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    Journal Article
  3. 3

    Foldable Kirigami Paper Electronics by Yang, Tilo H., Hida, Hikaru, Ichige, Daiki, Mizuno, Jun, Robert Kao, C., Shintake, Jun

    “…Paper Electronics In article number 1900891, Tilo H. Yang, Jun Shintake, and co‐workers report a method to fabricate paper electronics incorporating Kirigami,…”
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    Journal Article
  4. 4

    Low-Power Widely Tunable Gm-C Filter Employing an Adaptive DC-blocking, Triode-Biased MOSFET Transconductor by Hori, Shinichi, Matsuno, Noriaki, Maeda, Tadashi, Hida, Hikaru

    “…We propose a transconductor capable of providing a wide continuous-tuning-range filter applicable to Bluetooth, W-CDMA, LTE, and IEEE 802.11a/b/g W-LANs…”
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    Journal Article
  5. 5

    120-Gb/s multiplexing and 110-Gb/s demultiplexing ICs by Suzuki, Y., Yamazaki, Z., Amamiya, Y., Wada, S., Uchida, H., Kurioka, C., Tanaka, S., Hida, H.

    Published in IEEE journal of solid-state circuits (01-12-2004)
    “…InP HBT ICs capable of 120-Gb/s multiplexing and 110-Gb/s demultiplexing operation have been developed. They feature a direct-drive series-gating configuration…”
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    Journal Article Conference Proceeding
  6. 6

    Low-power-consumption direct-conversion CMOS transceiver for multi-standard 5-GHz wireless LAN systems with channel bandwidths of 5-20 MHz by Maeda, T., Yano, H., Hori, S., Matsuno, N., Yamase, T., Tokairin, T., Walkington, R., Yoshida, N., Numata, K., Yanagisawa, K., Takahashi, Y., Fujii, M., Hida, H.

    Published in IEEE journal of solid-state circuits (01-02-2006)
    “…This paper describes a low-power-consumption direct-conversion CMOS transceiver for WLAN systems operating at 4.9-5.95 GHz. Its power consumption is reduced by…”
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    Journal Article
  7. 7

    A Low-Power Dual-Band Triple-Mode WLAN CMOS Transceiver by Maeda, T., Matsuno, N., Hori, S., Yamase, T., Tokairin, T., Yanagisawa, K., Yano, H., Walkington, R., Numata, K., Yoshida, N., Takahashi, Y., Hida, H.

    Published in IEEE journal of solid-state circuits (01-11-2006)
    “…This paper describes a 0.18-mum CMOS direct-conversion dual-band triple-mode wireless LAN transceiver. The transceiver has a concurrent dual-band low-noise…”
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    Journal Article
  8. 8

    Low supply voltage operation of over-40-Gb/s digital ICs based on parallel-current-switching latch circuitry by Amamiya, Y., Yamazaki, Z., Suzuki, Y., Mamada, M., Hida, H.

    Published in IEEE journal of solid-state circuits (01-10-2005)
    “…We implemented a low-voltage latch circuit topology in a full-rate 4:1 multiplexer (MUX) using InP-HBT technology. The proposed latch circuitry incorporates…”
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    Journal Article Conference Proceeding
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    A diplexer-matching dual-band power amplifier LTCC module for IEEE 802.11a/b/g wireless LANs by Kunihiro, K., Yamanouchi, S., Miyazaki, T., Aoki, Y., Ikuina, K., Ohtsuka, T., Hida, H.

    “…We have developed a compact dual-band (2.4/5 GHz) power-amplifier module with a concurrent two-stage InGaP/GaAs HBT for triple-mode (IEEE 802.11a/b/g) WLANs…”
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    Conference Proceeding
  12. 12

    A widely tunable CMOS Gm-C filter with a negative source degeneration resistor transconductor by Shinichi Hori, Tadashi Maeda, hitoshi Yano, Noriaki Matsuno, Keiichi Numata, Nobuhide Yoshida, Yuji Takahashi, Tomoyuki Yamase, Walkington, R., Hikaru, H.

    “…We propose a new negative source degeneration resistor (NSDR) transconductor to achieve a wide continuous-tuning range gm-C filter applicable for…”
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    Conference Proceeding
  13. 13

    0.1- mu m p super(+)-GaAs gate HJFET's fabricated using two-step dry-etching and selective MOMBE growth techniques by Wada, Shigeki, Furuhata, Naoki, Tokushima, Masatoshi, Fukaishi, Muneo, Hida, Hikaru, Maeda, Tadashi

    Published in IEEE transactions on electron devices (01-06-1998)
    “…This paper reports the first successful fabrication of high-performance, 0.1- mu m p super(+)-gate pseudomorphic heterojunction-FET's (HJFET's). By introducing…”
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    Journal Article
  14. 14

    A 1.4-dB-NF variable-gain LNA with continuous control for 2-GHz-band mobile phones using InGaP emitter HBTs by Aoki, Yuuichi, Fujii, Masahiro, Ohkubo, Satoru, Yoshida, Sadayoshi, Niwa, Takaki, Miyoshi, Yosuke, Dodo, Hideaki, Goto, Norio, Hida, Hikaru

    “…We designed a continuously variable-gain low-noise-amplifier (VG-LNA) circuit with a noise figure (NF) of 1.4 dB. This VG-LNA has a diode-loaded emitter…”
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    Journal Article
  15. 15

    A 20-mA quiescent current two-stage W-CDMA power amplifier using anti-phase intermodulation distortion by Aoki, Y., Kunihiro, K., Miyazaki, T., Hirayama, T., Hida, H.

    “…This paper explains how the adjacent-channel-leakage-power ratio (ACLR) of power amplifiers (PAs) can be reduced by using gain-expansion amplifiers in tandem…”
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    Conference Proceeding
  16. 16

    An accurate HJFET current–voltage model including temperature dependence for a circuit simulator by Matsuno, Noriaki, Yano, Hitoshi, Hida, Hikaru, Maeda, Tadashi

    Published in Solid-state electronics (1999)
    “…We present a new hetero-junction FET (HJFET) current–voltage ( I– V) model intended for implementation with a large signal simulator. The developed model takes…”
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    Journal Article
  17. 17

    Low supply voltage operation of 40-Gb/s full-rate 4:1 multiplexer based on parallel-current-switching latch circuitry by Amamiya, Y., Suzuki, Y., Yamazaki, Y., Mamada, M., Hida, H.

    “…We implemented new circuit topology, a parallel-current-switching latch, in a full-rate 4:1 multiplexer using InP-HBT technology. This is the first report of…”
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    Conference Proceeding
  18. 18

    110Gb/s multiplexing and demultiplexing ICs by Suzuki, Y., Arnamiya, Y., Yamazaki, Z., Wada, S., Uchida, H., Kurioka, C., Tanaka, S., Hida, H.

    “…A 120Gb/s multiplexer and a 110Gb/s demultiplexer are implemented in an InP HBT process. They feature a direct drive series-gating configuration selector, an…”
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    Conference Proceeding
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    A +2.4/0 V controlled high power GaAs SPDT antenna switch IC for GSM application by Numata, K., Takahashi, Y., Maeda, T., Hida, H.

    “…We have developed a high-power-handling and low-voltage-controlled GaAs single-pole dual-throw (SPDT) antenna switch for GSM application. The switch circuit…”
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    Conference Proceeding